diff options
author | Jason Ekstrand <[email protected]> | 2018-01-22 23:40:48 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2018-01-24 19:05:36 -0800 |
commit | d38ec24f531fac0b53c406a09d17427309a3ffca (patch) | |
tree | e4b459382df05e6edc0150374bdd18189a8e017d /src/mesa | |
parent | dfe02179055b2504303e23988ab3d446b40de05a (diff) |
i965/miptree: Add an aux_disabled parameter to render_aux_usage
Only one of the callers of intel_miptree_render_aux_usage actually took
brw->draw_aux_buffer_disabled into account. This was causing us to
ignore draw_aux_buffer_disabled for the intel_miptree_prepare_render.
This isn't a problem because the draw_aux_buffer_disabled entry was set
during texture preparation and we already did the resolve at that time.
However, this also meant that the aux_usage we were passing to
brw_cache_flush_for_render and brw_render_cache_add_bo was wrong so our
automatic cache flushing around aux_usage changes wasn't happening.
This was causing GPU hangs in Oxenfree.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104711
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383
Fixes: ea0d2e98ecb369ab84e78c84709c0930ea8c293a
Cc: [email protected]
Reviewed-by: Iago Toral Quiroga <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 |
5 files changed, 17 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 76f2ae6858c..82d9de1ead5 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -320,7 +320,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw, enum isl_format dst_isl_format = brw_blorp_to_isl_format(brw, dst_format, true); enum isl_aux_usage dst_aux_usage = - intel_miptree_render_aux_usage(brw, dst_mt, dst_isl_format, false); + intel_miptree_render_aux_usage(brw, dst_mt, dst_isl_format, + false, false); const bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE; intel_miptree_prepare_access(brw, dst_mt, dst_level, 1, dst_layer, 1, dst_aux_usage, dst_clear_supported); @@ -1267,7 +1268,8 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, irb->mt, irb->mt_level, irb->mt_layer, num_layers); enum isl_aux_usage aux_usage = - intel_miptree_render_aux_usage(brw, irb->mt, isl_format, false); + intel_miptree_render_aux_usage(brw, irb->mt, isl_format, + false, false); intel_miptree_prepare_render(brw, irb->mt, level, irb->mt_layer, num_layers, aux_usage); diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 125e64b3c02..5cbf1d60c51 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -549,7 +549,8 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw) bool blend_enabled = ctx->Color.BlendEnabled & (1 << i); enum isl_aux_usage aux_usage = intel_miptree_render_aux_usage(brw, irb->mt, isl_format, - blend_enabled); + blend_enabled, + brw->draw_aux_buffer_disabled[i]); intel_miptree_prepare_render(brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count, @@ -625,7 +626,8 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) bool blend_enabled = ctx->Color.BlendEnabled & (1 << i); enum isl_aux_usage aux_usage = intel_miptree_render_aux_usage(brw, irb->mt, isl_format, - blend_enabled); + blend_enabled, + brw->draw_aux_buffer_disabled[i]); brw_render_cache_add_bo(brw, irb->mt->bo, isl_format, aux_usage); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 38af6bc0dea..fd2ee36a869 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -230,9 +230,9 @@ gen6_update_renderbuffer_surface(struct brw_context *brw, enum isl_format isl_format = brw->mesa_to_isl_render_format[rb_format]; enum isl_aux_usage aux_usage = - brw->draw_aux_buffer_disabled[unit] ? ISL_AUX_USAGE_NONE : intel_miptree_render_aux_usage(brw, mt, isl_format, - ctx->Color.BlendEnabled & (1 << unit)); + ctx->Color.BlendEnabled & (1 << unit), + brw->draw_aux_buffer_disabled[unit]); struct isl_view view = { .format = isl_format, diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 38287c4528c..c8081ee1095 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2682,10 +2682,14 @@ enum isl_aux_usage intel_miptree_render_aux_usage(struct brw_context *brw, struct intel_mipmap_tree *mt, enum isl_format render_format, - bool blend_enabled) + bool blend_enabled, + bool draw_aux_disabled) { struct gen_device_info *devinfo = &brw->screen->devinfo; + if (draw_aux_disabled) + return ISL_AUX_USAGE_NONE; + switch (mt->aux_usage) { case ISL_AUX_USAGE_MCS: assert(mt->mcs_buf); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 17dcdbca38c..6135af14528 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -652,7 +652,8 @@ enum isl_aux_usage intel_miptree_render_aux_usage(struct brw_context *brw, struct intel_mipmap_tree *mt, enum isl_format render_format, - bool blend_enabled); + bool blend_enabled, + bool draw_aux_disabled); void intel_miptree_prepare_render(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, |