diff options
| author | Matt Turner <[email protected]> | 2013-11-07 15:09:33 -0800 |
|---|---|---|
| committer | Matt Turner <[email protected]> | 2013-11-09 09:10:24 -0800 |
| commit | 68349e52194b7eba521b88d42ee8db3bfdf0a877 (patch) | |
| tree | ac2f758a202d3419bb95d6c134d4198fe40ab37d /src/mesa | |
| parent | b7dfb8528fd4c62218ea5c0a670d939c8d49e651 (diff) | |
i965/fs: Don't perform CSE on inst HW_REG dests (unless it's null)
Commit b16b3c87 began performing CSE on CMP instructions with null
destinations. I relaxed the restrictions a bit too much, thereby
allowing CSE to be performed on instructions with, for instance, an
explicit accumulator destination.
This broke the arb_gpu_shader5/fs-imulExtended shader tests because
they emit MUL instructions with the accumulator as the destination. CSE
would instead cause the MUL to write to a GRF, which is lower precision
than the accumulator.
Reviewed-by: Eric Anholt <[email protected]>
Cc: 10.0 <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp index 47938744cf6..27541db9be9 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp @@ -129,7 +129,8 @@ fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb) inst = (fs_inst *) inst->next) { /* Skip some cases. */ - if (is_expression(inst) && !inst->is_partial_write()) + if (is_expression(inst) && !inst->is_partial_write() && + (inst->dst.file != HW_REG || inst->dst.is_null())) { bool found = false; |