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authorJerome Glisse <[email protected]>2010-04-23 12:08:36 +0200
committerJerome Glisse <[email protected]>2010-04-23 12:08:36 +0200
commitccd13da0fc1f1813b55fc0d2181a6cb0d3b42b0d (patch)
tree3b7fd5f11394f21f5f1e383300a97dd1535b3397 /src/mesa
parentff20543c815a14fddad1efaaef1610454a1924d4 (diff)
parenteb4dc547885994cc7961f7996c33ff484f664964 (diff)
Merge remote branch 'origin/7.8'
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 1da31e7b2b4..ac64bbf874f 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -253,12 +253,15 @@ void r700UpdateShaderStates(GLcontext * ctx)
static void r700SetDepthState(GLcontext * ctx)
{
+ struct radeon_renderbuffer *rrb;
context_t *context = R700_CONTEXT(ctx);
R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
R600_STATECHANGE(context, db);
- if (ctx->Depth.Test)
+ rrb = radeon_get_depthbuffer(&context->radeon);
+
+ if (ctx->Depth.Test && rrb && rrb->bo)
{
SETbit(r700->DB_DEPTH_CONTROL.u32All, Z_ENABLE_bit);
if (ctx->Depth.Mask)