diff options
| author | Paul Berry <[email protected]> | 2013-08-11 20:29:34 -0700 |
|---|---|---|
| committer | Paul Berry <[email protected]> | 2013-09-11 11:17:31 -0700 |
| commit | a74af8148ded7417a46be5a9e300f2c6dfed4bed (patch) | |
| tree | e6b47bb6ed51f8c57aae4362573a318ddfd4e285 /src/mesa | |
| parent | bf5419e389a4a8339699e25ddb6cbe902cc22357 (diff) | |
i965/gen7: Add the ability to send URB_WRITE_OWORD messages.
Previously, brw_urb_WRITE() would always generate a URB_WRITE_HWORD
message, we always wanted to write data to the URB in pairs of varying
slots or larger (an HWORD is 32 bytes, which is 2 varying slots).
In order to support geometry shader EndPrimitive functionality, we'll
need the ability to write to just a single OWORD (16 byte) slot, since
we'll only be outputting 32 of the control data bits at a time. So
this patch adds a flag that will cause brw_urb_WRITE to generate a
URB_WRITE_OWORD message.
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu.h | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 7 |
3 files changed, 16 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 85e414d4f3a..007e7fb2185 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1172,7 +1172,8 @@ enum brw_message_target { #define BRW_MATH_DATA_VECTOR 0 #define BRW_MATH_DATA_SCALAR 1 -#define BRW_URB_OPCODE_WRITE 0 +#define BRW_URB_OPCODE_WRITE_HWORD 0 +#define BRW_URB_OPCODE_WRITE_OWORD 1 #define BRW_URB_SWIZZLE_NONE 0 #define BRW_URB_SWIZZLE_INTERLEAVE 1 diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 4d47cdd6221..720bc74591a 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -264,6 +264,14 @@ enum brw_urb_write_flags { BRW_URB_WRITE_USE_CHANNEL_MASKS = 0x20, /** + * Indicates that the data should be sent to the URB using the + * URB_WRITE_OWORD message rather than URB_WRITE_HWORD (gen == 7). This + * causes offsets to be interpreted as multiples of an OWORD instead of an + * HWORD, and only allows one OWORD to be written. + */ + BRW_URB_WRITE_OWORD = 0x40, + + /** * Convenient combination of flags: end the thread while simultaneously * marking the given URB entry as complete. */ diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index a99a3544a2e..cce87522f8b 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -529,7 +529,12 @@ static void brw_set_urb_message( struct brw_compile *p, msg_length, response_length, true, flags & BRW_URB_WRITE_EOT); if (brw->gen == 7) { - insn->bits3.urb_gen7.opcode = 0; /* URB_WRITE_HWORD */ + if (flags & BRW_URB_WRITE_OWORD) { + assert(msg_length == 2); /* header + one OWORD of data */ + insn->bits3.urb_gen7.opcode = BRW_URB_OPCODE_WRITE_OWORD; + } else { + insn->bits3.urb_gen7.opcode = BRW_URB_OPCODE_WRITE_HWORD; + } insn->bits3.urb_gen7.offset = offset; assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE); insn->bits3.urb_gen7.swizzle_control = swizzle_control; |