diff options
| author | Francisco Jerez <[email protected]> | 2016-09-01 22:12:04 -0700 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2016-09-14 14:50:58 -0700 |
| commit | 8bed1adfc144d9ae8d55ccb9b277942da8a78064 (patch) | |
| tree | 9f424997046dd786c1c4e85b23eb8f960e51333a /src/mesa | |
| parent | 3a74e437fdec02c28749c94bc1bcf21c3c4b48d7 (diff) | |
i965/vec4: Assign correct destination offset to rewritten instruction in register coalesce.
Because the pass already checks that the destination offset of each
'scan_inst' that needs to be rewritten matches 'inst->src[0].offset'
exactly, the final offset of the rewritten instruction is just the
original destination offset of the copy. This is in preparation for
adding support for sub-GRF offsets to the VEC4 IR.
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 8f8d2623416..470f814f562 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1254,8 +1254,7 @@ vec4_visitor::opt_register_coalesce() inst->src[0].swizzle); scan_inst->dst.file = inst->dst.file; scan_inst->dst.nr = inst->dst.nr; - scan_inst->dst.offset = scan_inst->dst.offset % REG_SIZE + - ROUND_DOWN_TO(inst->dst.offset, REG_SIZE); + scan_inst->dst.offset = inst->dst.offset; if (inst->saturate && inst->dst.type != scan_inst->dst.type) { /* If we have reached this point, scan_inst is a non |