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authorAlex Deucher <[email protected]>2009-08-20 11:33:41 -0400
committerAlex Deucher <[email protected]>2009-08-20 12:12:23 -0400
commit1b1d59137301b9f8bccba8e61fb2d93f824616bd (patch)
tree2cd87dfea43c13e3e4a0db631f4f0ac5d9239886 /src/mesa
parent39ec4a9253197c4507d53ce9a3c1d8963d8f5cea (diff)
r600: move misc regs from general state
These regs don't use the SET_CONTEXT_REG packet, so they weren't getting set correctly.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index c3c0923ebb0..43661ec714c 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -59,13 +59,6 @@ GLboolean r700InitChipObject(context_t *context)
r700->pStateList = (ContextState*) MALLOC (sizeof(ContextState)*sizeof(R700_CHIP_CONTEXT)/sizeof(unsigned int));
pStateListWork = r700->pStateList;
- // misc
- LINK_STATES(TA_CNTL_AUX);
- LINK_STATES(VC_ENHANCE);
- LINK_STATES(SQ_DYN_GPR_CNTL_PS_FLUSH_REQ);
- LINK_STATES(DB_DEBUG);
- LINK_STATES(DB_WATERMARKS);
-
// SC
LINK_STATES(PA_SC_SCREEN_SCISSOR_TL);
LINK_STATES(PA_SC_SCREEN_SCISSOR_BR);
@@ -749,6 +742,15 @@ GLboolean r700SendSQConfig(context_t *context)
R600_OUT_BATCH(r700->sq_config.SQ_STACK_RESOURCE_MGMT_1.u32All);
R600_OUT_BATCH(r700->sq_config.SQ_STACK_RESOURCE_MGMT_2.u32All);
END_BATCH();
+
+ BEGIN_BATCH_NO_AUTOSTATE(15);
+ R600_OUT_BATCH_REGVAL(TA_CNTL_AUX, r700->TA_CNTL_AUX.u32All);
+ R600_OUT_BATCH_REGVAL(VC_ENHANCE, r700->VC_ENHANCE.u32All);
+ R600_OUT_BATCH_REGVAL(R7xx_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, r700->SQ_DYN_GPR_CNTL_PS_FLUSH_REQ.u32All);
+ R600_OUT_BATCH_REGVAL(DB_DEBUG, r700->DB_DEBUG.u32All);
+ R600_OUT_BATCH_REGVAL(DB_WATERMARKS, r700->DB_WATERMARKS.u32All);
+ END_BATCH();
+
COMMIT_BATCH();
return GL_TRUE;