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authorFrancisco Jerez <[email protected]>2015-02-06 01:28:12 +0200
committerFrancisco Jerez <[email protected]>2015-02-10 16:05:51 +0200
commitdfe957c02b753dbb5b372e768a5677f577daf9ef (patch)
tree4ab03873f1c1add2df13a2a31c186248f1b2be90 /src/mesa
parent639696aa05df0b7f4bfb9e2e255863cd72effba3 (diff)
i965: Move up fs_inst::flag_subreg to backend_instruction.
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_ir_fs.h5
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h5
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp11
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_generator.cpp1
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp1
5 files changed, 16 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index a85adaebe99..0c7dcaf2750 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
@@ -239,11 +239,6 @@ public:
*/
uint8_t exec_size;
- /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
- * mod and predication.
- */
- uint8_t flag_subreg;
-
bool eot:1;
bool force_uncompressed:1;
bool force_sechalf:1;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 00bb4905c4c..281d5ee0c12 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -135,6 +135,11 @@ struct backend_instruction {
bool saturate:1;
bool shadow_compare:1;
bool header_present:1;
+
+ /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
+ * mod and predication.
+ */
+ unsigned flag_subreg:1;
};
#ifdef __cplusplus
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index f2339b399e3..622502ef3d9 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1283,13 +1283,20 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
vec4_instruction *inst = (vec4_instruction *)be_inst;
if (inst->predicate) {
- fprintf(file, "(%cf0) ",
- inst->predicate_inverse ? '-' : '+');
+ fprintf(file, "(%cf0.%d) ",
+ inst->predicate_inverse ? '-' : '+',
+ inst->flag_subreg);
}
fprintf(file, "%s", brw_instruction_name(inst->opcode));
if (inst->conditional_mod) {
fprintf(file, "%s", conditional_modifier[inst->conditional_mod]);
+ if (!inst->predicate &&
+ (brw->gen < 5 || (inst->opcode != BRW_OPCODE_SEL &&
+ inst->opcode != BRW_OPCODE_IF &&
+ inst->opcode != BRW_OPCODE_WHILE))) {
+ fprintf(file, ".f0.%d", inst->flag_subreg);
+ }
}
fprintf(file, " ");
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 898a6db4abf..e38e6eae35b 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1167,6 +1167,7 @@ vec4_generator::generate_code(const cfg_t *cfg)
brw_set_default_predicate_control(p, inst->predicate);
brw_set_default_predicate_inverse(p, inst->predicate_inverse);
+ brw_set_default_flag_reg(p, 0, inst->flag_subreg);
brw_set_default_saturate(p, inst->saturate);
brw_set_default_mask_control(p, inst->force_writemask_all);
brw_set_default_acc_write_control(p, inst->writes_accumulator);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ada4a0cdc4d..8eb00e737f7 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -49,6 +49,7 @@ vec4_instruction::vec4_instruction(enum opcode opcode, const dst_reg &dst,
this->ir = NULL;
this->urb_write_flags = BRW_URB_WRITE_NO_FLAGS;
this->header_present = false;
+ this->flag_subreg = 0;
this->mlen = 0;
this->base_mrf = 0;
this->offset = 0;