diff options
| author | Kenneth Graunke <[email protected]> | 2011-05-22 07:09:53 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2011-05-22 15:01:16 -0700 |
| commit | b522eb0717986bc7d8ca46ac1dd93a865e211345 (patch) | |
| tree | a8e71ebaae229121cee6669d79e3a0cd2af85782 /src/mesa | |
| parent | fd6f2d6e5783d8810d0ab88e1c470958fd5eb2eb (diff) | |
i965: Remove comments about pre-965 hardware.
They're irrelevant for this driver.
Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_tex_layout.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 9ac0713a1d3..92e5d0fff66 100644 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c @@ -152,9 +152,6 @@ GLboolean brw_miptree_layout(struct intel_context *intel, * in the texture surfaces run, so they may be "vertical" through * memory. As a result, the docs say in Surface Padding Requirements: * Sampling Engine Surfaces that two extra rows of padding are required. - * We don't know of similar requirements for pre-965, but given that - * those docs are silent on padding requirements in general, let's play - * it safe. */ if (mt->target == GL_TEXTURE_CUBE_MAP) mt->total_height += 2; |