diff options
| author | Henri Verbeet <[email protected]> | 2010-08-17 18:25:32 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2010-08-17 18:25:32 -0400 |
| commit | 8f5f44c9c8fa59e36efdf1acf3543ad81cb865d5 (patch) | |
| tree | 3c6dc1d67f616f1979e0ac539f8691239549b636 /src/mesa | |
| parent | 40e114b5dc60c5e196a86e33c2436b099ed9f392 (diff) | |
r600c: Handle reads from PROGRAM_OUTPUT
with glsl2, reads from outputs are legal
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_assembler.c | 25 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r700_assembler.h | 2 |
2 files changed, 20 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c index 9c954cbf70c..94bc26145d6 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.c +++ b/src/mesa/drivers/dri/r600/r700_assembler.c @@ -1357,7 +1357,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm, break; case PROGRAM_INPUT: setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_ABSOLUTE); - pAsm->S[fld].src.rtype = SRC_REG_INPUT; + pAsm->S[fld].src.rtype = SRC_REG_GPR; switch (pAsm->currentShaderType) { case SPT_FP: @@ -1368,6 +1368,19 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm, break; } break; + case PROGRAM_OUTPUT: + setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_ABSOLUTE); + pAsm->S[fld].src.rtype = SRC_REG_GPR; + switch (pAsm->currentShaderType) + { + case SPT_FP: + pAsm->S[fld].src.reg = pAsm->uiFP_OutputMap[pILInst->SrcReg[src].Index]; + break; + case SPT_VP: + pAsm->S[fld].src.reg = pAsm->ucVP_OutputMap[pILInst->SrcReg[src].Index]; + break; + } + break; default: radeon_error("Invalid source argument type : %d \n", pILInst->SrcReg[src].File); return GL_FALSE; @@ -1521,7 +1534,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm) bValidTexCoord = GL_TRUE; pAsm->S[0].src.reg = pAsm->ucVP_AttributeMap[pILInst->SrcReg[0].Index]; - pAsm->S[0].src.rtype = SRC_REG_INPUT; + pAsm->S[0].src.rtype = SRC_REG_GPR; break; } } @@ -1544,7 +1557,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm) bValidTexCoord = GL_TRUE; pAsm->S[0].src.reg = pAsm->uiFP_AttributeMap[pILInst->SrcReg[0].Index]; - pAsm->S[0].src.rtype = SRC_REG_INPUT; + pAsm->S[0].src.rtype = SRC_REG_GPR; break; case FRAG_ATTRIB_FACE: fprintf(stderr, "FRAG_ATTRIB_FACE unsupported\n"); @@ -1560,7 +1573,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm) bValidTexCoord = GL_TRUE; pAsm->S[0].src.reg = pAsm->uiFP_AttributeMap[pILInst->SrcReg[0].Index]; - pAsm->S[0].src.rtype = SRC_REG_INPUT; + pAsm->S[0].src.rtype = SRC_REG_GPR; } } @@ -1745,7 +1758,7 @@ GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr, else { if ( (pSource->rtype == SRC_REG_TEMPORARY) || - (pSource->rtype == SRC_REG_INPUT) + (pSource->rtype == SRC_REG_GPR) ) { src_sel = pSource->reg; @@ -2384,7 +2397,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) default: channel_swizzle = SQ_SEL_MASK; break; } if ( ((pSource[j]->rtype == SRC_REG_TEMPORARY) || - (pSource[j]->rtype == SRC_REG_INPUT)) + (pSource[j]->rtype == SRC_REG_GPR)) && (channel_swizzle <= SQ_SEL_W) ) { chan_counter[channel_swizzle]++; diff --git a/src/mesa/drivers/dri/r600/r700_assembler.h b/src/mesa/drivers/dri/r600/r700_assembler.h index dbc6cdb1903..ab954ec143e 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.h +++ b/src/mesa/drivers/dri/r600/r700_assembler.h @@ -108,7 +108,7 @@ typedef enum AddressMode typedef enum SrcRegisterType { SRC_REG_TEMPORARY = 0, - SRC_REG_INPUT = 1, + SRC_REG_GPR = 1, SRC_REG_CONSTANT = 2, SRC_REG_ALT_TEMPORARY = 3, SRC_REC_LITERAL = 4, |