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authorKenneth Graunke <[email protected]>2013-01-05 17:14:59 -0800
committerKenneth Graunke <[email protected]>2013-02-11 15:54:07 -0800
commitb9c5997bb392a53d3787954b93da92ae5929daf8 (patch)
tree8cde299088329e8958250ef02ec3e305c36f904a /src/mesa
parent0ac6d5a7fb58c4ca1f907b3fa4ba36b8f3b7e1f7 (diff)
i965: Reorganize brw_bits to match the order in brw_context.h.
This reorders the "brw_bits" array in brw_state_upload.c to match the order of the #defines in brw_context.h. Otherwise, it's really hard to see if any are missing. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 1e2a4c3cb4a..699a7a37a40 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -359,17 +359,17 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_PRIMITIVE),
DEFINE_BIT(BRW_NEW_CONTEXT),
DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
- DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
DEFINE_BIT(BRW_NEW_PSP),
DEFINE_BIT(BRW_NEW_SURFACES),
+ DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
DEFINE_BIT(BRW_NEW_INDICES),
- DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VERTICES),
DEFINE_BIT(BRW_NEW_BATCH),
+ DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
- DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
- DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
- DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
+ DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
{0, 0, 0}
};