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authorEric Anholt <[email protected]>2010-01-29 11:12:18 -0800
committerEric Anholt <[email protected]>2010-02-25 10:53:06 -0800
commitf58fbcf7618bcc6ef9da8e8939100b14ea4d584b (patch)
tree5de7b519bbe169ef14bdcda503d5cc4ba259e098 /src/mesa
parent520b64ddfb4c2efa742bc2217fef96fdec5eea9b (diff)
i965: Add untested REJECT_ALL clip state.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/Makefile1
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h21
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c3
-rw-r--r--src/mesa/drivers/dri/i965/gen6_clip_state.c76
5 files changed, 100 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index fb7ee096d92..3bf14e8a77c 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -86,6 +86,7 @@ DRIVER_SOURCES = \
brw_wm_state.c \
brw_wm_surface_state.c \
gen6_cc.c \
+ gen6_clip_state.c \
gen6_depthstencil.c \
gen6_gs_state.c \
gen6_vs_state.c
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 7ba1c77ebe3..52960da6827 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -845,6 +845,27 @@
/* DW6 */
# define GEN6_GS_ENABLE (1 << 15)
+#define CMD_3D_CLIP_STATE 0x7812 /* GEN6+ */
+/* DW1 */
+# define GEN6_CLIP_STATISTICS_ENABLE (1 << 10)
+/* DW2 */
+# define GEN6_CLIP_ENABLE (1 << 31)
+# define GEN6_CLIP_API_OGL (1 << 30)
+# define GEN6_CLIP_XY_TEST (1 << 28)
+# define GEN6_CLIP_Z_TEST (1 << 27)
+# define GEN6_CLIP_GB_TEST (1 << 26)
+# define GEN6_CLIP_MODE_NORMAL (0 << 13)
+# define GEN6_CLIP_MODE_REJECT_ALL (3 << 13)
+# define GEN6_CLIP_MODE_ACCEPT_ALL (4 << 13)
+# define GEN6_CLIP_PERSPECTIVE_DIVIDE_DISABLE (1 << 9)
+# define GEN6_CLIP_BARYCENTRIC_ENABLE (1 << 8)
+# define GEN6_CLIP_TRI_PROVOKE_SHIFT 4
+# define GEN6_CLIP_LINE_PROVOKE_SHIFT 2
+# define GEN6_CLIP_TRIFAN_PROVOKE_SHIFT 0
+/* DW3 */
+# define GEN6_CLIP_MIN_POINT_WIDTH_SHIFT 17
+# define GEN6_CLIP_MAX_POINT_WIDTH_SHIFT 6
+
#define CMD_3D_CONSTANT_VS_STATE 0x7815 /* GEN6+ */
#define CMD_3D_CONSTANT_GS_STATE 0x7816 /* GEN6+ */
# define GEN6_CONSTANT_BUFFER_3_ENABLE (1 << 15)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index c4d1f2556c9..596a9cd3a0b 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -93,6 +93,7 @@ const struct brw_tracked_state brw_index_buffer;
const struct brw_tracked_state gen6_binding_table_pointers;
const struct brw_tracked_state gen6_blend_state;
const struct brw_tracked_state gen6_cc_state_pointers;
+const struct brw_tracked_state gen6_clip_state;
const struct brw_tracked_state gen6_color_calc_state;
const struct brw_tracked_state gen6_depth_stencil_state;
const struct brw_tracked_state gen6_gs_state;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index dd797c42dd7..9f5d789e1ef 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -110,7 +110,6 @@ const struct brw_tracked_state *gen6_atoms[] =
&brw_wm_input_sizes,
&brw_vs_prog,
&brw_gs_prog,
- &brw_clip_prog,
&brw_sf_prog,
&brw_wm_prog,
@@ -135,13 +134,13 @@ const struct brw_tracked_state *gen6_atoms[] =
&gen6_vs_state,
&gen6_gs_state,
+ &gen6_clip_state,
#if 0
&brw_wm_samplers,
&brw_wm_unit,
&brw_sf_vp,
&brw_sf_unit,
- &brw_clip_unit,
/* Command packets:
*/
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
new file mode 100644
index 00000000000..f34e5f32ccc
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt <[email protected]>
+ *
+ */
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "brw_defines.h"
+#include "brw_util.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "intel_batchbuffer.h"
+
+static void
+upload_clip_state(struct brw_context *brw)
+{
+ struct intel_context *intel = &brw->intel;
+ GLcontext *ctx = &intel->ctx;
+ uint32_t depth_clamp = 0;
+ uint32_t provoking;
+
+ if (!ctx->Transform.DepthClamp)
+ depth_clamp = GEN6_CLIP_Z_TEST;
+
+ if (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION) {
+ provoking = 0;
+ } else {
+ provoking =
+ (2 << GEN6_CLIP_TRI_PROVOKE_SHIFT) |
+ (2 << GEN6_CLIP_TRIFAN_PROVOKE_SHIFT) |
+ (1 << GEN6_CLIP_LINE_PROVOKE_SHIFT);
+ }
+
+ BEGIN_BATCH(4);
+ OUT_BATCH(CMD_3D_CLIP_STATE << 16 | (4 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(GEN6_CLIP_ENABLE |
+ GEN6_CLIP_API_OGL |
+ GEN6_CLIP_MODE_REJECT_ALL | /* XXX: debug: get VS working */
+ GEN6_CLIP_XY_TEST |
+ depth_clamp |
+ provoking);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state gen6_clip_state = {
+ .dirty = {
+ .mesa = _NEW_TRANSFORM,
+ .brw = BRW_NEW_CONTEXT,
+ .cache = 0
+ },
+ .emit = upload_clip_state,
+};