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authorKenneth Graunke <[email protected]>2013-07-10 13:17:42 -0700
committerKenneth Graunke <[email protected]>2013-07-15 19:40:51 -0700
commitf254c942043e9da5f028688a652ccf1c18046922 (patch)
treeb9e665d757540dcde4b2797cf95ef5ab8b6dd9e3 /src/mesa
parenta0c8e762026acf2300951ac8a6b6bc293de4a4b1 (diff)
i965: Cite the Ivybridge PRM for DP message descriptor fields.
Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_structs.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 6e5a6822839..e1ba5f838d4 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1358,10 +1358,10 @@ struct brw_instruction
/**
* Message for any of the Gen7 Data Port caches.
*
- * Most fields are defined in BSpec volume 5c.2 Data Port / Messages /
- * Data Port Messages / Message Descriptor. Once again, "Slot Group
+ * Most fields are defined in the Ivybridge PRM, Volume 4 Part 1,
+ * section 3.9.2.1.1 "Message Descriptor". Once again, "Slot Group
* Select" and "Last Render Target" are part of the 6-bit message
- * control for Render Target Writes.
+ * control for Render Target Writes (section 3.9.11.2).
*/
struct {
GLuint binding_table_index:8;