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authorAntia Puentes <[email protected]>2015-09-14 09:50:59 +0200
committerIago Toral Quiroga <[email protected]>2015-09-14 12:11:46 +0200
commitb8d2263c83d29f4626ac0fe0316978aa6262aefb (patch)
treee6d2133b1a5b5e0a190bd0eaf306ad5a9680b50c /src/mesa
parent79f1a7ae28c37f77e08e550cd077959a2a1f8341 (diff)
i965/vec4_nir: Load constants as integers
Loads constants using integer as their register type, like it is done in FS backend. No shader-db changes in HSW. Cc: "10.6 11.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91716 Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index c21fd02bf68..175d92b6b31 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -450,7 +450,7 @@ void
vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr)
{
dst_reg reg = dst_reg(GRF, alloc.allocate(1));
- reg.type = BRW_REGISTER_TYPE_F;
+ reg.type = BRW_REGISTER_TYPE_D;
unsigned remaining = brw_writemask_for_size(instr->def.num_components);
@@ -471,7 +471,7 @@ vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr)
}
reg.writemask = writemask;
- emit(MOV(reg, src_reg(instr->value.f[i])));
+ emit(MOV(reg, src_reg(instr->value.i[i])));
remaining &= ~writemask;
}