diff options
author | Matt Turner <[email protected]> | 2015-01-05 13:51:03 -0800 |
---|---|---|
committer | Matt Turner <[email protected]> | 2015-01-23 17:57:40 -0800 |
commit | 94e7b59a75fc2ecc51a74196f6cd198546603b85 (patch) | |
tree | d5bbe9670e9860ce5b1ffd01aafffaf1676e9005 /src/mesa | |
parent | 40ae302a3c41d1aa839eb24c429888932f6fee53 (diff) |
i965: Convert CMP.GE -(abs)reg 0 -> CMP.Z reg 0.
total instructions in shared programs: 5952059 -> 5951603 (-0.01%)
instructions in affected programs: 138812 -> 138356 (-0.33%)
GAINED: 1
LOST: 0
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 12 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 |
2 files changed, 24 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 7280b6bac26..0ada5837cfd 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -2367,6 +2367,18 @@ fs_visitor::opt_algebraic() break; } break; + case BRW_OPCODE_CMP: + if (inst->conditional_mod == BRW_CONDITIONAL_GE && + inst->src[0].abs && + inst->src[0].negate && + inst->src[1].is_zero()) { + inst->src[0].abs = false; + inst->src[0].negate = false; + inst->conditional_mod = BRW_CONDITIONAL_Z; + progress = true; + break; + } + break; case BRW_OPCODE_SEL: if (inst->src[0].equals(inst->src[1])) { inst->opcode = BRW_OPCODE_MOV; diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 0fac9495210..89881967dfd 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -693,6 +693,18 @@ vec4_visitor::opt_algebraic() progress = true; } break; + case BRW_OPCODE_CMP: + if (inst->conditional_mod == BRW_CONDITIONAL_GE && + inst->src[0].abs && + inst->src[0].negate && + inst->src[1].is_zero()) { + inst->src[0].abs = false; + inst->src[0].negate = false; + inst->conditional_mod = BRW_CONDITIONAL_Z; + progress = true; + break; + } + break; case SHADER_OPCODE_RCP: { vec4_instruction *prev = (vec4_instruction *)inst->prev; if (prev->opcode == SHADER_OPCODE_SQRT) { |