i965: Move some gen4 WM defines to brw_compiler.h

These go in wm_prog_key so they're part of the compiler interface.

Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>

4 files changed, 46 insertions, 42 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h
index 297d8f82020..1b71c7f7f98 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -247,8 +247,30 @@ struct brw_gs_prog_key
    struct brw_sampler_prog_key_data tex;
 };
 
+/* A big lookup table is used to figure out which and how many
+ * additional regs will inserted before the main payload in the WM
+ * program execution.  These mainly relate to depth and stencil
+ * processing and the early-depth-test optimization.
+ */
+enum brw_wm_iz_bits {
+   BRW_WM_IZ_PS_KILL_ALPHATEST_BIT     = 0x1,
+   BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT     = 0x2,
+   BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT    = 0x4,
+   BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT     = 0x8,
+   BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT  = 0x10,
+   BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT   = 0x20,
+   BRW_WM_IZ_BIT_MAX                   = 0x40
+};
+
+enum brw_wm_aa_enable {
+   BRW_WM_AA_NEVER,
+   BRW_WM_AA_SOMETIMES,
+   BRW_WM_AA_ALWAYS
+};
+
 /** The program key for Fragment/Pixel Shaders. */
 struct brw_wm_prog_key {
+   /* Some collection of BRW_WM_IZ_* */
    uint8_t iz_lookup;
    bool stats_wm:1;
    bool flat_shade:1;
@@ -257,7 +279,7 @@ struct brw_wm_prog_key {
    bool clamp_fragment_color:1;
    bool persample_interp:1;
    bool multisample_fbo:1;
-   unsigned line_aa:2;
+   enum brw_wm_aa_enable line_aa:2;
    bool high_quality_derivatives:1;
    bool force_dual_color_blend:1;
    bool coherent_fb_fetch:1;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 4a07c14e807..dd3e20180af 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -457,53 +457,53 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
    if (brw->gen < 6) {
       /* _NEW_COLOR */
       if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
-         lookup |= IZ_PS_KILL_ALPHATEST_BIT;
+         lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
       }
 
       if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
-         lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
+         lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
       }
 
       /* _NEW_DEPTH */
       if (ctx->Depth.Test)
-         lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
+         lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
 
       if (brw_depth_writes_enabled(brw))
-         lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
+         lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
 
       /* _NEW_STENCIL | _NEW_BUFFERS */
       if (ctx->Stencil._Enabled) {
-         lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
+         lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
 
          if (ctx->Stencil.WriteMask[0] ||
              ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
-            lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
+            lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
       }
       key->iz_lookup = lookup;
    }
 
-   line_aa = AA_NEVER;
+   line_aa = BRW_WM_AA_NEVER;
 
    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
    if (ctx->Line.SmoothFlag) {
       if (brw->reduced_primitive == GL_LINES) {
-         line_aa = AA_ALWAYS;
+         line_aa = BRW_WM_AA_ALWAYS;
       }
       else if (brw->reduced_primitive == GL_TRIANGLES) {
          if (ctx->Polygon.FrontMode == GL_LINE) {
-            line_aa = AA_SOMETIMES;
+            line_aa = BRW_WM_AA_SOMETIMES;
 
             if (ctx->Polygon.BackMode == GL_LINE ||
                 (ctx->Polygon.CullFlag &&
                  ctx->Polygon.CullFaceMode == GL_BACK))
-               line_aa = AA_ALWAYS;
+               line_aa = BRW_WM_AA_ALWAYS;
          }
          else if (ctx->Polygon.BackMode == GL_LINE) {
-            line_aa = AA_SOMETIMES;
+            line_aa = BRW_WM_AA_SOMETIMES;
 
             if ((ctx->Polygon.CullFlag &&
                  ctx->Polygon.CullFaceMode == GL_FRONT))
-               line_aa = AA_ALWAYS;
+               line_aa = BRW_WM_AA_ALWAYS;
          }
       }
    }
@@ -610,14 +610,14 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
 
    if (brw->gen < 6) {
       if (prog->info.fs.uses_discard)
-         key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
+         key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
 
       if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
-         key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
+         key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
 
       /* Just assume depth testing. */
-      key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
-      key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
+      key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
+      key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
    }
 
    if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index c037b3da14d..d1bf868061e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -38,23 +38,6 @@
 #include "brw_context.h"
 #include "brw_eu.h"
 
-/* A big lookup table is used to figure out which and how many
- * additional regs will inserted before the main payload in the WM
- * program execution.  These mainly relate to depth and stencil
- * processing and the early-depth-test optimization.
- */
-#define IZ_PS_KILL_ALPHATEST_BIT    0x1
-#define IZ_PS_COMPUTES_DEPTH_BIT    0x2
-#define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
-#define IZ_DEPTH_TEST_ENABLE_BIT    0x8
-#define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
-#define IZ_STENCIL_TEST_ENABLE_BIT  0x20
-#define IZ_BIT_MAX                  0x40
-
-#define AA_NEVER     0
-#define AA_SOMETIMES 1
-#define AA_ALWAYS    2
-
 #ifdef __cplusplus
 extern "C" {
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp
index bbccf3a189e..5162a369765 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp
+++ b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp
@@ -31,7 +31,6 @@
 
 
 #include "brw_fs.h"
-#include "brw_wm.h"
 
 
 #undef P                        /* prompted depth */
@@ -48,7 +47,7 @@ static const struct {
    GLuint sd_to_rt:1;
    GLuint dd_present:1;
    GLuint ds_present:1;
-} wm_iz_table[IZ_BIT_MAX] =
+} wm_iz_table[BRW_WM_IZ_BIT_MAX] =
 {
  { P, 0, 0, 0, 0 },
  { P, 0, 0, 0, 0 },
@@ -117,8 +116,8 @@ static const struct {
 };
 
 /**
- * \param line_aa  AA_NEVER, AA_ALWAYS or AA_SOMETIMES
- * \param lookup  bitmask of IZ_* flags
+ * \param line_aa  BRW_WM_AA_NEVER, BRW_WM_AA_ALWAYS or BRW_WM_AA_SOMETIMES
+ * \param lookup  bitmask of BRW_WM_IZ_* flags
  */
 void fs_visitor::setup_fs_payload_gen4()
 {
@@ -129,7 +128,7 @@ void fs_visitor::setup_fs_payload_gen4()
    bool kill_stats_promoted_workaround = false;
    int lookup = key->iz_lookup;
 
-   assert(lookup < IZ_BIT_MAX);
+   assert(lookup < BRW_WM_IZ_BIT_MAX);
 
    /* Crazy workaround in the windowizer, which we need to track in
     * our register allocation and render target writes.  See the "If
@@ -137,7 +136,7 @@ void fs_visitor::setup_fs_payload_gen4()
     * Test Cases [Pre-DevGT] of the 3D Pipeline - Windower B-Spec.
     */
    if (key->stats_wm &&
-       (lookup & IZ_PS_KILL_ALPHATEST_BIT) &&
+       (lookup & BRW_WM_IZ_PS_KILL_ALPHATEST_BIT) &&
        wm_iz_table[lookup].mode == P) {
       kill_stats_promoted_workaround = true;
    }
@@ -153,10 +152,10 @@ void fs_visitor::setup_fs_payload_gen4()
    if (wm_iz_table[lookup].sd_to_rt || kill_stats_promoted_workaround)
       source_depth_to_render_target = true;
 
-   if (wm_iz_table[lookup].ds_present || key->line_aa != AA_NEVER) {
+   if (wm_iz_table[lookup].ds_present || key->line_aa != BRW_WM_AA_NEVER) {
       payload.aa_dest_stencil_reg = reg;
       runtime_check_aads_emit =
-         !wm_iz_table[lookup].ds_present && key->line_aa == AA_SOMETIMES;
+         !wm_iz_table[lookup].ds_present && key->line_aa == BRW_WM_AA_SOMETIMES;
       reg++;
    }