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authorKenneth Graunke <[email protected]>2014-10-15 19:17:21 -0700
committerKenneth Graunke <[email protected]>2014-10-21 21:14:00 -0700
commitf5c3f095b97dc5d8997ca448ffffbca67b3db4d5 (patch)
treef187faadc607598b8e45180716f2c11619f0e99a /src/mesa
parentcb36e79f96101528080917c469dea3b525df2a32 (diff)
i965/vec4: Simplify visit(ir_expression *)'s result_src/dst setup.
Using dst_reg(this, ir->type) automatically sets the writemask to the proper size for the type; src_reg(dst_reg) preserves that. This should be equivalent, but less code. Note that src_reg(dst_reg) either uses SWIZZLE_XXXX or SWIZZLE_XYZW, so the old code did need the manual writemask adjustment, since it constructed the registers the other way around. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp19
1 files changed, 6 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 0b2b9ca7009..d0587cd5f62 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1259,8 +1259,6 @@ vec4_visitor::visit(ir_expression *ir)
{
unsigned int operand;
src_reg op[Elements(ir->operands)];
- src_reg result_src;
- dst_reg result_dst;
vec4_instruction *inst;
if (ir->operation == ir_binop_add) {
@@ -1273,6 +1271,12 @@ vec4_visitor::visit(ir_expression *ir)
return;
}
+ /* Storage for our result. Ideally for an assignment we'd be using
+ * the actual storage for the result here, instead.
+ */
+ dst_reg result_dst(this, ir->type);
+ src_reg result_src(result_dst);
+
for (operand = 0; operand < ir->get_num_operands(); operand++) {
this->result.file = BAD_FILE;
ir->operands[operand]->accept(this);
@@ -1289,19 +1293,8 @@ vec4_visitor::visit(ir_expression *ir)
assert(!ir->operands[operand]->type->is_matrix());
}
- /* Storage for our result. Ideally for an assignment we'd be using
- * the actual storage for the result here, instead.
- */
- result_src = src_reg(this, ir->type);
- /* convenience for the emit functions below. */
- result_dst = dst_reg(result_src);
/* If nothing special happens, this is the result. */
this->result = result_src;
- /* Limit writes to the channels that will be used by result_src later.
- * This does limit this temp's use as a temporary for multi-instruction
- * sequences.
- */
- result_dst.writemask = (1 << ir->type->vector_elements) - 1;
switch (ir->operation) {
case ir_unop_logic_not: