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authorKenneth Graunke <[email protected]>2014-06-28 17:48:42 -0700
committerKenneth Graunke <[email protected]>2014-06-30 14:05:27 -0700
commitdf4eeed0befc39385f3baa40b4f38183b9c76363 (patch)
tree4b2276b0c41fbdef9eb04c65196bc7bd0937121f /src/mesa
parent6928959d8eba05b8a7d62d8829472ddc298bc8d1 (diff)
i965/disasm: Properly disassemble jump targets on Gen4-5.
Previously, our dissasembly for flow control instructions looked like: 0x00000040: else(8) ip 65540D { align16 switch }; It didn't print InstCount properly for ELSE/ENDIF, and didn't even attempt to disassemble PopCount. Now it looks like: 0x00000040: else(8) Jump: 4 Pop: 1 { align16 switch }; which is much more readable. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_disasm.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 8966edaf890..7773ad9be45 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -1207,6 +1207,21 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
} else {
format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
}
+ } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
+ opcode == BRW_OPCODE_CONTINUE ||
+ opcode == BRW_OPCODE_ELSE)) {
+ pad(file, 16);
+ format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
+ pad(file, 32);
+ format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
+ } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
+ opcode == BRW_OPCODE_IFF ||
+ opcode == BRW_OPCODE_HALT)) {
+ pad(file, 16);
+ format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
+ } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
+ pad(file, 16);
+ format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
} else if (opcode == BRW_OPCODE_JMPI) {
format(file, " %d", brw_inst_imm_d(brw, inst));
} else if (opcode_descs[opcode].nsrc == 3) {