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authorAndre Maasikas <[email protected]>2009-12-03 12:26:44 +0200
committerAndre Maasikas <[email protected]>2009-12-08 10:02:23 +0200
commit369669ff9a7ff7636cadef8e2b13f2f28face98f (patch)
tree04f5847a4a90006ce26f3aab86959a6388ddb4c4 /src/mesa
parentdc0777d3e3b760d7faa5fb99a189919bde07ca0b (diff)
r600: add support for TXB instruction
makes testing other things easier - does not hang the card TODO: enable TEX dependency tracking in vertex programs
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c26
1 files changed, 9 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index 6ff08e1cfb7..be875ae6b80 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -3450,22 +3450,6 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
need_barrier = GL_TRUE;
}
- switch (pAsm->pILInst[pAsm->uiCurInst].Opcode)
- {
- case OPCODE_TEX:
- break;
- case OPCODE_TXB:
- radeon_error("do not support TXB yet\n");
- return GL_FALSE;
- break;
- case OPCODE_TXP:
- break;
- default:
- radeon_error("Internal error: bad texture op (not TEX)\n");
- return GL_FALSE;
- break;
- }
-
if (pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP)
{
GLuint tmp = gethelpr(pAsm);
@@ -3644,7 +3628,15 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
}
- pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
+ if(pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXB)
+ {
+ pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE_L;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
+ }
+
pAsm->is_tex = GL_TRUE;
if ( GL_TRUE == need_barrier )
{