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authorEric Anholt <[email protected]>2011-08-09 15:19:26 -0700
committerEric Anholt <[email protected]>2011-08-16 13:04:43 -0700
commitaed5e353e95f47773864c6e61c506b9ddad0e2e9 (patch)
tree103d1a3dda1d1f602c6bfb6e1912abcec78c0c06 /src/mesa
parenta55fbbc1a2b579aed1e80036367b521ef6928f66 (diff)
i965/vs: Clamp vertex color outputs when required by ARB_color_buffer_float.
Fixes glsl-vs-vertex-color.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 93252f73285..2a1f003b5ce 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1764,7 +1764,16 @@ vec4_visitor::emit_urb_writes()
if (attr == VERT_RESULT_PSIZ)
continue;
- emit(BRW_OPCODE_MOV, brw_message_reg(mrf++), src_reg(output_reg[attr]));
+ vec4_instruction *inst = emit(BRW_OPCODE_MOV, brw_message_reg(mrf++),
+ src_reg(output_reg[attr]));
+
+ if ((attr == VERT_RESULT_COL0 ||
+ attr == VERT_RESULT_COL1 ||
+ attr == VERT_RESULT_BFC0 ||
+ attr == VERT_RESULT_BFC1) &&
+ c->key.clamp_vertex_color) {
+ inst->saturate = true;
+ }
/* If this was MRF 15, we can't fit anything more into this URB
* WRITE. Note that base_mrf of 1 means that MRF 15 is an