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authorEric Anholt <[email protected]>2009-12-21 13:08:41 -0800
committerEric Anholt <[email protected]>2010-02-25 10:53:08 -0800
commit591a996ab6a8ef96a46e88317071330d94c4138f (patch)
tree288cdbceece52b07c11cf14a7b3ef243e1bde1a2 /src/mesa
parentab8c37fe18e0367e8718774198a0d0086fde0cf9 (diff)
i965: Move PIPELINE_SELECT to the top of gen6 3d pipeline setup.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 824502ca6eb..aa83d7ad18e 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -116,6 +116,8 @@ const struct brw_tracked_state *gen6_atoms[] =
&gen6_cc_vp,
/* Command packets: */
+ &brw_invarient_state,
+
&gen6_viewport_state, /* must do after *_vp stages */
&gen6_urb,
@@ -138,8 +140,6 @@ const struct brw_tracked_state *gen6_atoms[] =
&gen6_scissor_state,
- &brw_invarient_state,
-
&brw_state_base_address,
&gen6_binding_table_pointers,