diff options
author | Jason Ekstrand <[email protected]> | 2014-11-12 16:24:21 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2015-01-15 07:19:01 -0800 |
commit | c2abfc0b86628bb1b756e4ef125c97cb4386aea2 (patch) | |
tree | 7f28c0f58225fbe7696b70fa9131428c9004d677 /src/mesa | |
parent | e0aa4c6272851ed418dfa18ee6014f40b0e266c2 (diff) |
i965/fs_nir: Handle SSA constants
Reviewed-by: Connor Abbott <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 50 |
1 files changed, 33 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 3ec2fa66be6..019d649b468 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -981,25 +981,37 @@ fs_visitor::nir_emit_alu(nir_alu_instr *instr) fs_reg fs_visitor::get_nir_src(nir_src src) { - fs_reg reg; - if (src.reg.reg->is_global) - reg = nir_globals[src.reg.reg->index]; - else - reg = nir_locals[src.reg.reg->index]; + if (src.is_ssa) { + assert(src.ssa->parent_instr->type == nir_instr_type_load_const); + nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr); + fs_reg reg(GRF, virtual_grf_alloc(src.ssa->num_components), + BRW_REGISTER_TYPE_D); - /* to avoid floating-point denorm flushing problems, set the type by - * default to D - instructions that need floating point semantics will set - * this to F if they need to - */ - reg.type = BRW_REGISTER_TYPE_D; - reg.reg_offset = src.reg.base_offset; - if (src.reg.indirect) { - reg.reladdr = new(mem_ctx) fs_reg(); - *reg.reladdr = retype(get_nir_src(*src.reg.indirect), - BRW_REGISTER_TYPE_D); - } + for (unsigned i = 0; i < src.ssa->num_components; ++i) + emit(MOV(offset(reg, i), fs_reg(load->value.i[i]))); - return reg; + return reg; + } else { + fs_reg reg; + if (src.reg.reg->is_global) + reg = nir_globals[src.reg.reg->index]; + else + reg = nir_locals[src.reg.reg->index]; + + /* to avoid floating-point denorm flushing problems, set the type by + * default to D - instructions that need floating point semantics will set + * this to F if they need to + */ + reg.type = BRW_REGISTER_TYPE_D; + reg.reg_offset = src.reg.base_offset; + if (src.reg.indirect) { + reg.reladdr = new(mem_ctx) fs_reg(); + *reg.reladdr = retype(get_nir_src(*src.reg.indirect), + BRW_REGISTER_TYPE_D); + } + + return reg; + } } fs_reg @@ -1652,6 +1664,10 @@ fs_visitor::nir_emit_texture(nir_tex_instr *instr) void fs_visitor::nir_emit_load_const(nir_load_const_instr *instr) { + /* Bail on SSA constant loads. These are used for immediates. */ + if (instr->dest.is_ssa) + return; + fs_reg dest = get_nir_dest(instr->dest); dest.type = BRW_REGISTER_TYPE_UD; if (instr->array_elems == 0) { |