diff options
| author | Eric Anholt <[email protected]> | 2010-08-17 15:07:22 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2010-08-17 16:39:17 -0700 |
| commit | a58514cc9c5cc5867f9140700462c5ac5749550d (patch) | |
| tree | f600748cd63f801d9a55f2a4f92d03e539fce07b /src/mesa | |
| parent | bdc0e5285a3d7d29b953970e43ca548cbc4e7e30 (diff) | |
i915: Enable ARB_fragment_shader by default.
Now that we have glsl2 with if flattening in place, most shaders will
just work. Remaining failing shaders will mostly be due to loop
unrolling (in progress), some possible if flattening failures in
inlining functions (planning on fixing), and the register/instruction
count limits.
While the GLSL and GLSL-ES specs say that shaders shouldn't fail to
compile/link due to register/instruction limits, in practice we're not
the first vendor to expose GLSL on hardware with these limitations.
The benefit to application developers of providing a better language
for GPU programming is greater than the pain of having to handle
instruction limits (which they had to for ARB_fp on this hardware
anyway)
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_screen.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 15a465c6402..8c41115ea49 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -70,7 +70,7 @@ PUBLIC const char __driConfigOptions[] = DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).") DRI_CONF_OPT_END - DRI_CONF_OPT_BEGIN(fragment_shader, bool, false) + DRI_CONF_OPT_BEGIN(fragment_shader, bool, true) DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.") DRI_CONF_OPT_END |