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authorChris Forbes <[email protected]>2013-07-07 23:13:07 +1200
committerChris Forbes <[email protected]>2013-07-14 19:58:11 +1200
commit1ec66f2fb2fea0497efebc1db83c75ec95a816a4 (patch)
tree36cbb50d68839a8e56994f7581d0112165cb4c40 /src/mesa
parent796b73d1feeafa7ce128273f722409ad697bfdb4 (diff)
i965/vs: Gen4/5: enable front colors if back colors are written
Fixes undefined results if a back color is written, but the corresponding front color is not, and only backfacing primitives are drawn. Results are still undefined if a frontfacing primitive is drawn, but that's OK. The other reasonable way to fix this would have been to just pick the one color slot that was populated, but that dilutes the value of the tests. On Gen6+, the fixed function clipper and triangle setup already take care of this. Fixes 11 piglits: spec/glsl-1.10/execution/interpolation/interpolation-none-gl_Back*Color-* NOTE: This is a candidate for stable branches. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 60b40c5cf45..5b8173dcf03 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -277,6 +277,12 @@ do_vs_prog(struct brw_context *brw,
if (c.key.point_coord_replace & (1 << i))
outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
}
+
+ /* if back colors are written, allocate slots for front colors too */
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
+ outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
+ outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
}
brw_compute_vue_map(brw, &prog_data.base.vue_map, outputs_written,