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authorEric Anholt <[email protected]>2010-02-01 09:04:12 -0800
committerEric Anholt <[email protected]>2010-02-25 10:53:08 -0800
commitf69d46150c308285a518391db02cc9cba0f2a12d (patch)
tree7a8ce92f0cabdfb47cd3b82d642cec6b268821c9 /src/mesa
parent2ab3bf2fa37042386a2d50f60b1d0e32e26b91c2 (diff)
i965: Add a couple SNB state packets I saw in other batchbuffer dumps.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h21
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c34
2 files changed, 55 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 50c4d6d0a46..52cd12df598 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1024,6 +1024,8 @@
# define GEN6_CONSTANT_BUFFER_1_ENABLE (1 << 13)
# define GEN6_CONSTANT_BUFFER_0_ENABLE (1 << 12)
+#define CMD_3D_SAMPLE_MASK 0x7818 /* GEN6+ */
+
#define CMD_DRAW_RECT 0x7900
#define CMD_BLEND_CONSTANT_COLOR 0x7901
#define CMD_CHROMA_KEY 0x7904
@@ -1034,6 +1036,25 @@
#define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7909
#define CMD_AA_LINE_PARAMETERS 0x790a
+#define CMD_GS_SVB_INDEX 0x790b /* CTG+ */
+/* DW1 */
+# define SVB_INDEX_SHIFT 29
+# define SVB_LOAD_INTERNAL_VERTEX_COUNT (1 << 0) /* SNB+ */
+/* DW2: SVB index */
+/* DW3: SVB maximum index */
+
+#define CMD_3D_MULTISAMPLE 0x790d /* SNB+ */
+/* DW1 */
+# define MS_PIXEL_LOCATION_CENTER (0 << 4)
+# define MS_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
+# define MS_NUMSAMPLES_1 (0 << 1)
+# define MS_NUMSAMPLES_4 (2 << 1)
+# define MS_NUMSAMPLES_8 (3 << 1)
+
+#define CMD_3D_CLEAR_PARAMS 0x7910 /* ILK+ */
+# define DEPTH_CLEAR_VALID (1 << 15)
+/* DW1: depth clear value */
+
#define CMD_PIPE_CONTROL 0x7a00
#define CMD_3D_PRIM 0x7b00
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index b4e7dd547f3..d030ed41f4a 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -314,6 +314,14 @@ static void emit_depthbuffer(struct brw_context *brw)
ADVANCE_BATCH();
}
+
+ /* Initialize it for safety. */
+ if (intel->gen >= 6) {
+ BEGIN_BATCH(2);
+ OUT_BATCH(CMD_3D_CLEAR_PARAMS << 16 | (2 - 2));
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+ }
}
const struct brw_tracked_state brw_depthbuffer = {
@@ -511,6 +519,32 @@ static void upload_invarient_state( struct brw_context *brw )
BRW_BATCH_STRUCT(brw, &gdo);
}
+ intel_batchbuffer_emit_mi_flush(intel->batch);
+
+ if (intel->gen >= 6) {
+ int i;
+
+ BEGIN_BATCH(3);
+ OUT_BATCH(CMD_3D_MULTISAMPLE << 16 | (3 - 2));
+ OUT_BATCH(MS_PIXEL_LOCATION_CENTER |
+ MS_NUMSAMPLES_1);
+ OUT_BATCH(0); /* positions for 4/8-sample */
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(2);
+ OUT_BATCH(CMD_3D_SAMPLE_MASK << 16 | (2 - 2));
+ OUT_BATCH(1);
+ ADVANCE_BATCH();
+
+ for (i = 0; i < 4; i++) {
+ BEGIN_BATCH(4);
+ OUT_BATCH(CMD_GS_SVB_INDEX << 16 | (4 - 2));
+ OUT_BATCH(i << SVB_INDEX_SHIFT);
+ OUT_BATCH(0);
+ OUT_BATCH(0xffffffff);
+ ADVANCE_BATCH();
+ }
+ }
/* 0x61020000 State Instruction Pointer */
{