diff options
| author | Matt Turner <[email protected]> | 2013-04-21 00:18:11 -0700 |
|---|---|---|
| committer | Matt Turner <[email protected]> | 2013-04-22 09:45:10 -0700 |
| commit | ec646e465493ffc12caeccad01a9333f82e85517 (patch) | |
| tree | f1d8cbdf82ff0fe7c922d5575ccea09254d6a694 /src/mesa | |
| parent | 6654b9d1ebb6eaef5d21f23e75144aac9bdcafb5 (diff) | |
i965: Apply CMP NULL {Switch} work-around to other Gen7s.
Listed in the restrictions section of CMP, but not on the work-arounds
page.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 704f219f6f7..dda562faa9f 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -1677,8 +1677,11 @@ void brw_CMP(struct brw_compile *p, /* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec workarounds * page says: * "Any CMP instruction with a null destination must use a {switch}." + * + * It also applies to other Gen7 platforms (IVB, BYT) even though it isn't + * mentioned on their work-arounds pages. */ - if (intel->is_haswell) { + if (intel->gen == 7) { if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE && dest.nr == BRW_ARF_NULL) { insn->header.thread_control = BRW_THREAD_SWITCH; |