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authorFrancisco Jerez <[email protected]>2017-01-23 23:53:03 -0800
committerFrancisco Jerez <[email protected]>2017-01-31 10:32:42 -0800
commite81130d7a146fe6a750bf903e910dc2c7c90d513 (patch)
treed425178752a8cc2a5f6989d85eaef3e530a66737 /src/mesa
parent56314f5bafdfeb514adf8401c52f216bd430bbb2 (diff)
mesa/program: Translate csel operation from GLSL IR.
This will be used internally by the GLSL front-end in order to implement some built-in functions. Plumb it through MESA IR for back-ends that rely on this translation pass. v2: Add comment. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Juan A. Suarez Romero <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/program/ir_to_mesa.cpp9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 0ae797f1eca..dc5f8016f37 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1360,13 +1360,20 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
emit(ir, OPCODE_LRP, result_dst, op[2], op[1], op[0]);
break;
+ case ir_triop_csel:
+ /* We assume that boolean true and false are 1.0 and 0.0. OPCODE_CMP
+ * selects src1 if src0 is < 0, src2 otherwise.
+ */
+ op[0].negate = ~op[0].negate;
+ emit(ir, OPCODE_CMP, result_dst, op[0], op[1], op[2]);
+ break;
+
case ir_binop_vector_extract:
case ir_triop_fma:
case ir_triop_bitfield_extract:
case ir_triop_vector_insert:
case ir_quadop_bitfield_insert:
case ir_binop_ldexp:
- case ir_triop_csel:
case ir_binop_carry:
case ir_binop_borrow:
case ir_binop_imul_high: