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authorIlia Mirkin <[email protected]>2014-02-12 18:22:56 -0500
committerIlia Mirkin <[email protected]>2014-02-13 11:06:41 -0500
commit0c8b165366d68291e3013c7308b8b1fdd5ade2a2 (patch)
treef7ad0563a5424ebbf0fd7f0bac44a995df078b00 /src/mesa
parent0ef3ce415522c77f11477c340efeef7b61cb8cb3 (diff)
nouveau: fix chipset checks for nv1a by using the oclass instead
Commit f4ebcd133b9 ("dri/nouveau: NV17_3D class is not available for NV1a chipset") fixed this partially by using the correct 3d class. However there were a lot of checks left over comparing against the chipset. Reported-and-tested-by: John F. Godfrey <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: 9.2 10.0 10.1 <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_context.c8
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state_fb.c4
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state_raster.c3
3 files changed, 8 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/nouveau/nv10_context.c b/src/mesa/drivers/dri/nouveau/nv10_context.c
index 904a41081f4..00a935880e0 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_context.c
@@ -63,7 +63,7 @@ nv10_use_viewport_zclear(struct gl_context *ctx)
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct gl_renderbuffer *depthRb = fb->Attachment[BUFFER_DEPTH].Renderbuffer;
- return context_chipset(ctx) < 0x17 &&
+ return context_eng3d(ctx)->oclass < NV17_3D_CLASS &&
!nctx->hierz.clear_blocked && depthRb &&
(_mesa_get_format_bits(depthRb->Format,
GL_DEPTH_BITS) >= 24);
@@ -184,7 +184,7 @@ nv10_clear(struct gl_context *ctx, GLbitfield buffers)
}
if ((buffers & BUFFER_BIT_DEPTH) && ctx->Depth.Mask) {
- if (context_chipset(ctx) >= 0x17)
+ if (context_eng3d(ctx)->oclass >= NV17_3D_CLASS)
nv17_zclear(ctx, &buffers);
else
nv10_zclear(ctx, &buffers);
@@ -245,7 +245,7 @@ nv10_hwctx_init(struct gl_context *ctx)
BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
PUSH_DATA (push, 0);
- if (context_chipset(ctx) >= 0x17) {
+ if (context_eng3d(ctx)->oclass >= NV17_3D_CLASS) {
BEGIN_NV04(push, NV17_3D(UNK01AC), 2);
PUSH_DATA (push, fifo->vram);
PUSH_DATA (push, fifo->vram);
@@ -257,7 +257,7 @@ nv10_hwctx_init(struct gl_context *ctx)
PUSH_DATA (push, 1);
}
- if (context_chipset(ctx) >= 0x11) {
+ if (context_eng3d(ctx)->oclass >= NV15_3D_CLASS) {
BEGIN_NV04(push, SUBC_3D(0x120), 3);
PUSH_DATA (push, 0);
PUSH_DATA (push, 1);
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c
index 19769e5c47f..fb66b2d5494 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c
@@ -106,7 +106,7 @@ nv10_emit_framebuffer(struct gl_context *ctx, int emit)
/* At least nv11 seems to get sad if we don't do this before
* swapping RTs.*/
- if (context_chipset(ctx) < 0x17) {
+ if (context_eng3d(ctx)->oclass < NV17_3D_CLASS) {
int i;
for (i = 0; i < 6; i++) {
@@ -140,7 +140,7 @@ nv10_emit_framebuffer(struct gl_context *ctx, int emit)
PUSH_MTHDl(push, NV10_3D(ZETA_OFFSET), BUFCTX_FB,
s->bo, 0, bo_flags);
- if (context_chipset(ctx) >= 0x17) {
+ if (context_eng3d(ctx)->oclass >= NV17_3D_CLASS) {
setup_hierz_buffer(ctx);
context_dirty(ctx, ZCLEAR);
}
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
index bd4a78e1bdb..da414a0b06b 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
@@ -28,6 +28,7 @@
#include "nouveau_context.h"
#include "nouveau_gldefs.h"
#include "nouveau_util.h"
+#include "nv_object.xml.h"
#include "nv10_3d.xml.h"
#include "nv10_driver.h"
@@ -120,7 +121,7 @@ nv10_emit_logic_opcode(struct gl_context *ctx, int emit)
struct nouveau_pushbuf *push = context_push(ctx);
assert(!ctx->Color.ColorLogicOpEnabled
- || context_chipset(ctx) >= 0x11);
+ || context_eng3d(ctx)->oclass >= NV15_3D_CLASS);
BEGIN_NV04(push, NV11_3D(COLOR_LOGIC_OP_ENABLE), 2);
PUSH_DATAb(push, ctx->Color.ColorLogicOpEnabled);