diff options
author | Alan Hourihane <[email protected]> | 2008-02-22 00:18:54 +0000 |
---|---|---|
committer | Alan Hourihane <[email protected]> | 2008-02-22 00:20:27 +0000 |
commit | 1c718c0d78cf4eae9e02b03a0abbec384db948a6 (patch) | |
tree | 6eb984875b15b05b0a0683f9e4bf5838b5da66ae /src/mesa | |
parent | 758b99894170c1c18370b370eb33dda7d0d14a8d (diff) |
Use drm_i915_sarea instead of drmI830Sarea and remove i830_common.h
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_context.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_context.h | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_context.c | 17 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_context.h | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_buffers.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_ioctl.c | 22 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_screen.c | 24 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_screen.h | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/server/i830_common.h | 256 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/server/i830_dri.h | 9 |
10 files changed, 43 insertions, 302 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c index 40c5870e7c5..1c340f79400 100644 --- a/src/mesa/drivers/dri/i915/intel_context.c +++ b/src/mesa/drivers/dri/i915/intel_context.c @@ -404,7 +404,7 @@ intelInitContext(struct intel_context *intel, GLcontext *shareCtx = (GLcontext *) sharedContextPrivate; __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private; - drmI830Sarea *saPriv = (drmI830Sarea *) + struct drm_i915_sarea *saPriv = (struct drm_i915_sarea *) (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset); int fthrottle_mode; @@ -713,7 +713,7 @@ intelContendedLock(struct intel_context *intel, GLuint flags) { __DRIdrawablePrivate *dPriv = intel->driDrawable; __DRIscreenPrivate *sPriv = intel->driScreen; - drmI830Sarea *sarea = intel->sarea; + struct drm_i915_sarea *sarea = intel->sarea; int drawable_changed = 0; drmGetLock(intel->driFd, intel->hHWContext, flags); diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h index 151e9e276d2..5ca2fb7bd8a 100644 --- a/src/mesa/drivers/dri/i915/intel_context.h +++ b/src/mesa/drivers/dri/i915/intel_context.h @@ -39,7 +39,6 @@ #include "intel_screen.h" #include "intel_tex_obj.h" #include "i915_drm.h" -#include "i830_common.h" #include "tnl/t_vertex.h" #define TAG(x) intel##x @@ -236,7 +235,7 @@ struct intel_context __DRIdrawablePrivate *driDrawable; __DRIscreenPrivate *driScreen; intelScreenPrivate *intelScreen; - drmI830Sarea *sarea; + struct drm_i915_sarea *sarea; GLuint lastStamp; diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c index 459039a8879..c39c0c2f0f2 100644 --- a/src/mesa/drivers/dri/i965/intel_context.c +++ b/src/mesa/drivers/dri/i965/intel_context.c @@ -49,7 +49,6 @@ #include "intel_chipset.h" #include "i830_dri.h" -#include "i830_common.h" #include "intel_tex.h" #include "intel_span.h" @@ -325,14 +324,14 @@ static void intelBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q) { struct intel_context *intel = intel_context( ctx ); - drmI830MMIO io = { - .read_write = MMIO_READ, + struct drm_i915_mmio io = { + .read_write = I915_MMIO_READ, .reg = MMIO_REGS_PS_DEPTH_COUNT, .data = &q->Result }; intel->stats_wm++; intelFinish(&intel->ctx); - drmCommandWrite(intel->driFd, DRM_I830_MMIO, &io, sizeof(io)); + drmCommandWrite(intel->driFd, DRM_I915_MMIO, &io, sizeof(io)); } static void @@ -340,13 +339,13 @@ intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q) { struct intel_context *intel = intel_context( ctx ); GLuint64EXT tmp; - drmI830MMIO io = { - .read_write = MMIO_READ, + struct drm_i915_mmio io = { + .read_write = I915_MMIO_READ, .reg = MMIO_REGS_PS_DEPTH_COUNT, .data = &tmp }; intelFinish(&intel->ctx); - drmCommandWrite(intel->driFd, DRM_I830_MMIO, &io, sizeof(io)); + drmCommandWrite(intel->driFd, DRM_I915_MMIO, &io, sizeof(io)); q->Result = tmp - q->Result; q->Ready = GL_TRUE; intel->stats_wm--; @@ -463,7 +462,7 @@ GLboolean intelInitContext( struct intel_context *intel, GLcontext *shareCtx = (GLcontext *) sharedContextPrivate; __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private; - volatile drmI830Sarea *saPriv = (drmI830Sarea *) + volatile struct drm_i915_sarea *saPriv = (struct drm_i915_sarea *) (((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset); if (!_mesa_initialize_context(&intel->ctx, @@ -739,7 +738,7 @@ static void intelContendedLock( struct intel_context *intel, GLuint flags ) { __DRIdrawablePrivate *dPriv = intel->driDrawable; __DRIscreenPrivate *sPriv = intel->driScreen; - volatile drmI830Sarea * sarea = intel->sarea; + volatile struct drm_i915_sarea * sarea = intel->sarea; int me = intel->hHWContext; drmGetLock(intel->driFd, intel->hHWContext, flags); diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index 6c7fd8c12f2..6b69c9c8661 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -37,7 +37,7 @@ #include "intel_screen.h" #include "intel_tex_obj.h" -#include "i830_common.h" +#include "i915_drm.h" #include "tnl/t_vertex.h" #define TAG(x) intel##x @@ -205,7 +205,7 @@ struct intel_context __DRIdrawablePrivate *driReadDrawable; __DRIscreenPrivate *driScreen; intelScreenPrivate *intelScreen; - volatile drmI830Sarea *sarea; + volatile struct drm_i915_sarea *sarea; GLuint lastStamp; diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index d6665081ff9..8f59eb5c2bf 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -304,7 +304,7 @@ intelWindowMoved(struct intel_context *intel) if (!intel->intelScreen->driScrnPriv->dri2.enabled && intel->intelScreen->driScrnPriv->ddx_version.minor >= 7) { - volatile drmI830Sarea *sarea = intel->sarea; + volatile struct drm_i915_sarea *sarea = intel->sarea; drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w, .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h }; drm_clip_rect_t planeA_rect = { .x1 = sarea->planeA_x, .y1 = sarea->planeA_y, diff --git a/src/mesa/drivers/dri/intel/intel_ioctl.c b/src/mesa/drivers/dri/intel/intel_ioctl.c index 34287964c0d..c8f70ae4786 100644 --- a/src/mesa/drivers/dri/intel/intel_ioctl.c +++ b/src/mesa/drivers/dri/intel/intel_ioctl.c @@ -50,7 +50,7 @@ int intelEmitIrqLocked(struct intel_context *intel) { - drmI830IrqEmit ie; + struct drm_i915_irq_emit ie; int ret, seq = 1; if (intel->no_hw) @@ -63,9 +63,9 @@ intelEmitIrqLocked(struct intel_context *intel) ie.irq_seq = &seq; - ret = drmCommandWriteRead(intel->driFd, DRM_I830_IRQ_EMIT, &ie, sizeof(ie)); + ret = drmCommandWriteRead(intel->driFd, DRM_I915_IRQ_EMIT, &ie, sizeof(ie)); if (ret) { - fprintf(stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret); + fprintf(stderr, "%s: drm_i915_irq_emit: %d\n", __FUNCTION__, ret); exit(1); } @@ -77,9 +77,9 @@ intelEmitIrqLocked(struct intel_context *intel) void intelWaitIrq(struct intel_context *intel, int seq) { - drm_i915_irq_wait_t iw; + struct drm_i915_irq_wait iw; int ret, lastdispatch; - volatile drmI830Sarea *sarea = intel->sarea; + volatile struct drm_i915_sarea *sarea = intel->sarea; if (intel->no_hw) return; @@ -90,7 +90,7 @@ intelWaitIrq(struct intel_context *intel, int seq) do { lastdispatch = sarea->last_dispatch; - ret = drmCommandWrite(intel->driFd, DRM_I830_IRQ_WAIT, &iw, sizeof(iw)); + ret = drmCommandWrite(intel->driFd, DRM_I915_IRQ_WAIT, &iw, sizeof(iw)); } while (ret == -EAGAIN || ret == -EINTR || (ret == -EBUSY && lastdispatch != sarea->last_dispatch) || @@ -98,7 +98,7 @@ intelWaitIrq(struct intel_context *intel, int seq) (ret == 0 && sarea->last_dispatch - seq >= (1 << 24))); if (ret) { - fprintf(stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret); + fprintf(stderr, "%s: drm_i915_irq_wait: %d\n", __FUNCTION__, ret); exit(1); } } @@ -110,7 +110,7 @@ intel_batch_ioctl(struct intel_context *intel, GLuint used, GLboolean ignore_cliprects, GLboolean allow_unlock) { - drmI830BatchBuffer batch; + struct drm_i915_batchbuffer batch; if (intel->no_hw) return; @@ -139,9 +139,9 @@ intel_batch_ioctl(struct intel_context *intel, batch.start, batch.start + batch.used * 4, batch.DR4, batch.num_cliprects); - if (drmCommandWrite(intel->driFd, DRM_I830_BATCHBUFFER, &batch, + if (drmCommandWrite(intel->driFd, DRM_I915_BATCHBUFFER, &batch, sizeof(batch))) { - fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno); + fprintf(stderr, "DRM_I915_BATCHBUFFER: %d\n", -errno); UNLOCK_HARDWARE(intel); exit(1); } @@ -181,7 +181,7 @@ intel_exec_ioctl(struct intel_context *intel, if (drmCommandWriteRead(intel->driFd, DRM_I915_EXECBUFFER, &execbuf, sizeof(execbuf))) { - fprintf(stderr, "DRM_I830_EXECBUFFER: %d\n", -errno); + fprintf(stderr, "DRM_I915_EXECBUFFER: %d\n", -errno); UNLOCK_HARDWARE(intel); exit(1); } diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 2392c2c49cc..463d015d688 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -212,7 +212,7 @@ intelPrintDRIInfo(intelScreenPrivate * intelScreen, static void -intelPrintSAREA(const drmI830Sarea * sarea) +intelPrintSAREA(const struct drm_i915_sarea * sarea) { fprintf(stderr, "SAREA: sarea width %d height %d\n", sarea->width, sarea->height); @@ -239,7 +239,7 @@ intelPrintSAREA(const drmI830Sarea * sarea) */ void intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen, - drmI830Sarea * sarea) + struct drm_i915_sarea * sarea) { intelScreen->width = sarea->width; intelScreen->height = sarea->height; @@ -293,7 +293,7 @@ intelHandleDrawableConfig(__DRIdrawablePrivate *dPriv, __DRIDrawableConfigEvent *event) { struct intel_framebuffer *intel_fb = dPriv->driverPrivate; - struct intel_region *region; + struct intel_region *region = NULL; struct intel_renderbuffer *rb, *depth_rb, *stencil_rb; struct intel_context *intel = dPriv->driContextPriv->driverPrivate; int cpp = intel->ctx.Visual.rgbBits / 8; @@ -418,14 +418,14 @@ static GLboolean intel_get_param(__DRIscreenPrivate *psp, int param, int *value) { int ret; - drmI830GetParam gp; + struct drm_i915_getparam gp; gp.param = param; gp.value = value; - ret = drmCommandWriteRead(psp->fd, DRM_I830_GETPARAM, &gp, sizeof(gp)); + ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp)); if (ret) { - fprintf(stderr, "drmI830GetParam: %d\n", ret); + fprintf(stderr, "drm_i915_getparam: %d\n", ret); return GL_FALSE; } @@ -436,7 +436,7 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv) { intelScreenPrivate *intelScreen; I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv; - drmI830Sarea *sarea; + struct drm_i915_sarea *sarea; if (sPriv->devPrivSize != sizeof(I830DRIRec)) { fprintf(stderr, @@ -457,7 +457,7 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv) intelScreen->driScrnPriv = sPriv; sPriv->private = (void *) intelScreen; intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset; - sarea = (drmI830Sarea *) + sarea = (struct drm_i915_sarea *) (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset); intelScreen->deviceID = gDRIPriv->deviceID; @@ -479,12 +479,12 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv) intelScreen->drmMinor = sPriv->drm_version.minor; /* Determine if IRQs are active? */ - if (!intel_get_param(sPriv, I830_PARAM_IRQ_ACTIVE, + if (!intel_get_param(sPriv, I915_PARAM_IRQ_ACTIVE, &intelScreen->irq_active)) return GL_FALSE; /* Determine if batchbuffers are allowed */ - if (!intel_get_param(sPriv, I830_PARAM_ALLOW_BATCHBUFFER, + if (!intel_get_param(sPriv, I915_PARAM_ALLOW_BATCHBUFFER, &intelScreen->allow_batchbuffer)) return GL_FALSE; @@ -893,12 +893,12 @@ PUBLIC __GLcontextModes *__dri2DriverInitScreen(__DRIscreenPrivate *psp) return GL_FALSE; /* Determine if IRQs are active? */ - if (!intel_get_param(psp, I830_PARAM_IRQ_ACTIVE, + if (!intel_get_param(psp, I915_PARAM_IRQ_ACTIVE, &intelScreen->irq_active)) return GL_FALSE; /* Determine if batchbuffers are allowed */ - if (!intel_get_param(psp, I830_PARAM_ALLOW_BATCHBUFFER, + if (!intel_get_param(psp, I915_PARAM_ALLOW_BATCHBUFFER, &intelScreen->allow_batchbuffer)) return GL_FALSE; diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h index b1ca500008b..e62b2d7c89a 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.h +++ b/src/mesa/drivers/dri/intel/intel_screen.h @@ -30,7 +30,7 @@ #include <sys/time.h> #include "dri_util.h" -#include "i830_common.h" +#include "i915_drm.h" #include "xmlconfig.h" /* XXX: change name or eliminate to avoid conflict with "struct @@ -88,7 +88,7 @@ extern void intelUnmapScreenRegions(intelScreenPrivate * intelScreen); extern void intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen, - drmI830Sarea * sarea); + struct drm_i915_sarea * sarea); extern void intelDestroyContext(__DRIcontextPrivate * driContextPriv); diff --git a/src/mesa/drivers/dri/intel/server/i830_common.h b/src/mesa/drivers/dri/intel/server/i830_common.h deleted file mode 100644 index f1fd3939ab9..00000000000 --- a/src/mesa/drivers/dri/intel/server/i830_common.h +++ /dev/null @@ -1,256 +0,0 @@ -/************************************************************************** - -Copyright 2001 VA Linux Systems Inc., Fremont, California. -Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas. - -All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the "Software"), -to deal in the Software without restriction, including without limitation -on the rights to use, copy, modify, merge, publish, distribute, sub -license, and/or sell copies of the Software, and to permit persons to whom -the Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice (including the next -paragraph) shall be included in all copies or substantial portions of the -Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, -DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR -OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE -USE OR OTHER DEALINGS IN THE SOFTWARE. - -**************************************************************************/ - -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.1 2002/09/11 00:29:32 dawes Exp $ */ - -#ifndef _I830_COMMON_H_ -#define _I830_COMMON_H_ - - -#define I830_NR_TEX_REGIONS 255 /* maximum due to use of chars for next/prev */ -#define I830_LOG_MIN_TEX_REGION_SIZE 14 - - -/* Driver specific DRM command indices - * NOTE: these are not OS specific, but they are driver specific - */ -#define DRM_I830_INIT 0x00 -#define DRM_I830_FLUSH 0x01 -#define DRM_I830_FLIP 0x02 -#define DRM_I830_BATCHBUFFER 0x03 -#define DRM_I830_IRQ_EMIT 0x04 -#define DRM_I830_IRQ_WAIT 0x05 -#define DRM_I830_GETPARAM 0x06 -#define DRM_I830_SETPARAM 0x07 -#define DRM_I830_ALLOC 0x08 -#define DRM_I830_FREE 0x09 -#define DRM_I830_INIT_HEAP 0x0a -#define DRM_I830_CMDBUFFER 0x0b -#define DRM_I830_DESTROY_HEAP 0x0c -#define DRM_I830_SET_VBLANK_PIPE 0x0d -#define DRM_I830_GET_VBLANK_PIPE 0x0e -#define DRM_I830_MMIO 0x10 - -typedef struct { - enum { - I830_INIT_DMA = 0x01, - I830_CLEANUP_DMA = 0x02, - I830_RESUME_DMA = 0x03 - } func; - unsigned int mmio_offset; - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; - unsigned int back_pitch; - unsigned int depth_pitch; - unsigned int cpp; - unsigned int chipset; -} drmI830Init; - -typedef struct { - drmTextureRegion texList[I830_NR_TEX_REGIONS+1]; - int last_upload; /* last time texture was uploaded */ - int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ - int ctxOwner; /* last context to upload state */ - /** Last context that used the buffer manager. */ - int texAge; - int pf_enabled; /* is pageflipping allowed? */ - int pf_active; - int pf_current_page; /* which buffer is being displayed? */ - int perf_boxes; /* performance boxes to be displayed */ - int width, height; /* screen size in pixels */ - - drm_handle_t front_handle; - int front_offset; - int front_size; - - drm_handle_t back_handle; - int back_offset; - int back_size; - - drm_handle_t depth_handle; - int depth_offset; - int depth_size; - - drm_handle_t tex_handle; - int tex_offset; - int tex_size; - int log_tex_granularity; - int pitch; - int rotation; /* 0, 90, 180 or 270 */ - int rotated_offset; - int rotated_size; - int rotated_pitch; - int virtualX, virtualY; - - unsigned int front_tiled; - unsigned int back_tiled; - unsigned int depth_tiled; - unsigned int rotated_tiled; - unsigned int rotated2_tiled; - - int planeA_x; - int planeA_y; - int planeA_w; - int planeA_h; - int planeB_x; - int planeB_y; - int planeB_w; - int planeB_h; - - /* Triple buffering */ - drm_handle_t third_handle; - int third_offset; - int third_size; - unsigned int third_tiled; - - /* buffer object handles for the static buffers. May change - * over the lifetime of the client, though it doesn't in our current - * implementation. - */ - unsigned int front_bo_handle; - unsigned int back_bo_handle; - unsigned int third_bo_handle; - unsigned int depth_bo_handle; -} drmI830Sarea; - -/* Flags for perf_boxes - */ -#define I830_BOX_RING_EMPTY 0x1 /* populated by kernel */ -#define I830_BOX_FLIP 0x2 /* populated by kernel */ -#define I830_BOX_WAIT 0x4 /* populated by kernel & client */ -#define I830_BOX_TEXTURE_LOAD 0x8 /* populated by kernel */ -#define I830_BOX_LOST_CONTEXT 0x10 /* populated by client */ - - -typedef struct { - int start; /* agp offset */ - int used; /* nr bytes in use */ - int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ - int DR4; /* window origin for GFX_OP_DRAWRECT_INFO*/ - int num_cliprects; /* mulitpass with multiple cliprects? */ - drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */ -} drmI830BatchBuffer; - -typedef struct { - char *buf; /* agp offset */ - int sz; /* nr bytes in use */ - int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ - int DR4; /* window origin for GFX_OP_DRAWRECT_INFO*/ - int num_cliprects; /* mulitpass with multiple cliprects? */ - drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */ -} drmI830CmdBuffer; - -typedef struct { - int *irq_seq; -} drmI830IrqEmit; - -typedef struct { - int irq_seq; -} drmI830IrqWait; - -typedef struct { - int param; - int *value; -} drmI830GetParam; - -#define I830_PARAM_IRQ_ACTIVE 1 -#define I830_PARAM_ALLOW_BATCHBUFFER 2 - -typedef struct { - int param; - int value; -} drmI830SetParam; - -#define I830_SETPARAM_USE_MI_BATCHBUFFER_START 1 -#define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY 2 -#define I830_SETPARAM_ALLOW_BATCHBUFFER 3 - - -/* A memory manager for regions of shared memory: - */ -#define I830_MEM_REGION_AGP 1 - -typedef struct { - int region; - int alignment; - int size; - int *region_offset; /* offset from start of fb or agp */ -} drmI830MemAlloc; - -typedef struct { - int region; - int region_offset; -} drmI830MemFree; - -typedef struct { - int region; - int size; - int start; -} drmI830MemInitHeap; - -typedef struct { - int region; -} drmI830MemDestroyHeap; - -#define DRM_I830_VBLANK_PIPE_A 1 -#define DRM_I830_VBLANK_PIPE_B 2 - -typedef struct { - int pipe; -} drmI830VBlankPipe; - -#define MMIO_READ 0 -#define MMIO_WRITE 1 - -#define MMIO_REGS_IA_PRIMATIVES_COUNT 0 -#define MMIO_REGS_IA_VERTICES_COUNT 1 -#define MMIO_REGS_VS_INVOCATION_COUNT 2 -#define MMIO_REGS_GS_PRIMITIVES_COUNT 3 -#define MMIO_REGS_GS_INVOCATION_COUNT 4 -#define MMIO_REGS_CL_PRIMITIVES_COUNT 5 -#define MMIO_REGS_CL_INVOCATION_COUNT 6 -#define MMIO_REGS_PS_INVOCATION_COUNT 7 -#define MMIO_REGS_PS_DEPTH_COUNT 8 - -typedef struct { - unsigned int read_write:1; - unsigned int reg:31; - void __user *data; -} drmI830MMIO; - -#endif /* _I830_DRM_H_ */ diff --git a/src/mesa/drivers/dri/intel/server/i830_dri.h b/src/mesa/drivers/dri/intel/server/i830_dri.h index c2a3af8cbf7..def049e7a6b 100644 --- a/src/mesa/drivers/dri/intel/server/i830_dri.h +++ b/src/mesa/drivers/dri/intel/server/i830_dri.h @@ -1,16 +1,15 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.4 2002/10/30 12:52:18 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.6 2003/09/28 20:15:59 alanh Exp $ */ #ifndef _I830_DRI_H #define _I830_DRI_H #include "xf86drm.h" -#include "i830_common.h" #define I830_MAX_DRAWABLES 256 #define I830_MAJOR_VERSION 1 -#define I830_MINOR_VERSION 7 -#define I830_PATCHLEVEL 2 +#define I830_MINOR_VERSION 9 +#define I830_PATCHLEVEL 0 #define I830_REG_SIZE 0x80000 @@ -41,7 +40,7 @@ typedef struct _I830DRIRec { int bitsPerPixel; int unused11[8]; /* was front/back/depth/rotated offset/pitch */ - + int unused12; /* logTextureGranularity */ int unused13; /* textureOffset */ |