diff options
author | Eric Anholt <[email protected]> | 2013-03-18 11:26:17 -0700 |
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committer | Eric Anholt <[email protected]> | 2013-04-01 16:17:26 -0700 |
commit | 8edc7cbe645b650bcb4e7fa190c9322c289ec177 (patch) | |
tree | a8afa7988f9ecc2e0c26a45a985eae1877655c40 /src/mesa | |
parent | 9f43b8492818bab47ef9cc489b91c2618446a3e9 (diff) |
i965/fs: Clean up the setup of gen4 simd16 message destinations.
I think this makes it much more obvious what's going on here.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index d2673165536..5d11e6719a6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -916,11 +916,10 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate, * this weirdness around to the expected layout. */ orig_dst = dst; - const glsl_type *vec_type = - glsl_type::get_instance(ir->type->base_type, 4, 1); - dst = fs_reg(this, glsl_type::get_array_instance(vec_type, 2)); - dst.type = intel->is_g4x ? brw_type_for_base_type(ir->type) - : BRW_REGISTER_TYPE_F; + dst = fs_reg(GRF, virtual_grf_alloc(8), + (intel->is_g4x ? + brw_type_for_base_type(ir->type) : + BRW_REGISTER_TYPE_F)); } fs_inst *inst = NULL; |