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authorKenneth Graunke <[email protected]>2011-07-30 16:44:49 -0700
committerKenneth Graunke <[email protected]>2011-08-01 23:57:37 -0700
commit81b036b4d79423c194596461b098a525af0102c2 (patch)
treea673891a1aa46bbccb25b4be93dcf5c0d9d91143 /src/mesa
parentb1b4ea0b3679db0b8fddaa9663a10d4712bba3b7 (diff)
i965/gen5+: Fix incorrect miptree layout for non-power-of-two cubemaps.
For power-of-two sizes, h0 == mt->height0 since it's already a multiple of two. However, for NPOT, they're different; h1 should be computed based on the original size. Fixes piglit test "cubemap npot" and oglconform test "textureNPOT". NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_layout.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index f462f32b19a..46a417a08ed 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -60,7 +60,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
* given in Volume 1 of the BSpec.
*/
h0 = ALIGN(mt->height0, align_h);
- h1 = ALIGN(minify(h0), align_h);
+ h1 = ALIGN(minify(mt->height0), align_h);
qpitch = (h0 + h1 + (intel->gen >= 7 ? 12 : 11) * align_h);
if (mt->compressed)
qpitch /= 4;