diff options
author | Francisco Jerez <[email protected]> | 2016-08-12 16:13:16 -0700 |
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committer | Francisco Jerez <[email protected]> | 2016-08-18 20:05:00 -0700 |
commit | 7ceb42ccc5f7943fc839ed19e06b9b7be38dacb0 (patch) | |
tree | 21e87843de1307bc3310d8b41e65942800c10e10 /src/mesa | |
parent | 4147ca75d5c5423d70232b3712c0772450384ab0 (diff) |
i965/sched: Change the scheduling heuristics to favor early program termination.
This uses the unblocked time of the exit assigned to each available
node to attempt to unblock exit nodes as early as possible,
potentially reducing the runtime of the shader when an exit branch is
taken. There is a natural trade-off between terminating the program
as early as possible and reducing the worst-case latency of the
program as a whole (since this will typically move exit-unblocking
nodes closer to its dependencies potentially causing additional stalls
of the execution pipeline), but in practice the bandwidth and ALU
cycle savings from terminating the program earlier tend to outweigh
the slight increase in worst-case program execution latency, so it
makes sense to prefer nodes likely to unblock an earlier exit
regardless of the latency benefits of other available nodes.
I haven't observed any benchmark regressions from this change after
testing on VLV, HSW, BDW, BSW and SKL. The FPS of the GfxBench
Manhattan benchmark increases by 10%-20% and the FPS of Unigine Valley
improves by roughly 5% depending on the platform and settings.
The change to the register pressure-sensitive heuristic is rather
conservative and gives precedence to the existing heuristic in order
to avoid increasing register pressure and causing spill count and SIMD
width regressions in shader-db. It may make sense to revisit this
with additional performance data.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 96562cf2eed..dfcaa80b58b 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -1407,11 +1407,15 @@ fs_instruction_scheduler::choose_instruction_to_schedule() if (mode == SCHEDULE_PRE || mode == SCHEDULE_POST) { int chosen_time = 0; - /* Of the instructions ready to execute or the closest to - * being ready, choose the oldest one. + /* Of the instructions ready to execute or the closest to being ready, + * choose the one most likely to unblock an early program exit, or + * otherwise the oldest one. */ foreach_in_list(schedule_node, n, &instructions) { - if (!chosen || n->unblocked_time < chosen_time) { + if (!chosen || + exit_unblocked_time(n) < exit_unblocked_time(chosen) || + (exit_unblocked_time(n) == exit_unblocked_time(chosen) && + n->unblocked_time < chosen_time)) { chosen = n; chosen_time = n->unblocked_time; } @@ -1500,6 +1504,15 @@ fs_instruction_scheduler::choose_instruction_to_schedule() continue; } + /* Prefer the node most likely to unblock an early program exit. + */ + if (exit_unblocked_time(n) < exit_unblocked_time(chosen)) { + chosen = n; + continue; + } else if (exit_unblocked_time(n) > exit_unblocked_time(chosen)) { + continue; + } + /* If all other metrics are equal, we prefer the first instruction in * the list (program execution). */ |