diff options
| author | Kenneth Graunke <[email protected]> | 2011-05-17 23:53:52 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2011-05-18 01:31:29 -0700 |
| commit | 3e0bb02358d627e784a2b7041d6e2e23e3dfd2c5 (patch) | |
| tree | ec8d8f15492ea54c2547dcc3c0b87ee7035e0474 /src/mesa | |
| parent | 2758e65f28cc68411775ec41c53f773268cddc05 (diff) | |
i965: Rename IS_GT1 and IS_GT2 to IS_SNB_GT1 and IS_SNB_GT2.
This should help distinguish Sandybridge GT1/GT2 from Ivybridge GT1/GT2.
Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_chipset.h | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index a7b7c6f086b..df753abed02 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -195,7 +195,7 @@ GLboolean brwCreateContext( int api, assert(!"Unknown gen7 device."); } } else if (intel->gen == 6) { - if (IS_GT2(intel->intelScreen->deviceID)) { + if (IS_SNB_GT2(intel->intelScreen->deviceID)) { /* This could possibly be 80, but is supposed to require * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a * GPU reset to change. diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h index 40fb69049c1..ca5c295545f 100644 --- a/src/mesa/drivers/dri/intel/intel_chipset.h +++ b/src/mesa/drivers/dri/intel/intel_chipset.h @@ -131,16 +131,16 @@ /* Compat macro for intel_decode.c */ #define IS_IRONLAKE(devid) IS_GEN5(devid) -#define IS_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ +#define IS_SNB_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ devid == PCI_CHIP_SANDYBRIDGE_S) -#define IS_GT2(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ +#define IS_SNB_GT2(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS) -#define IS_GEN6(devid) (IS_GT1(devid) || IS_GT2(devid)) +#define IS_GEN6(devid) (IS_SNB_GT1(devid) || IS_SNB_GT2(devid)) #define IS_IVB_GT1(devid) (devid == PCI_CHIP_IVYBRIDGE_GT1 || \ devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \ |