i965: Rename BRW_MESSAGE_TARGET_* to BRW_SFID_* and document them.

When reading the data port code, it was not clear to me what these
values meant, nor where I could find them in the documentation.
Especially since the latest BSpec and older PRMs document them in
radically different places...neither of which are near the descriptions
of individual messages.

Cite the documentation, and rename them to SFID to signify that these
are Shared Function IDs that one can read about in the GPU overview,
rather than arbitrary bitfields.  While we're add it, make them an enum.

Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>

3 files changed, 75 insertions, 60 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index dee4cef18ed..308a842617e 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -745,18 +745,32 @@ enum opcode {
 #define BRW_POLYGON_FACING_FRONT      0
 #define BRW_POLYGON_FACING_BACK       1
 
-#define BRW_MESSAGE_TARGET_NULL               0
-#define BRW_MESSAGE_TARGET_MATH               1 /* reserved on GEN6 */
-#define BRW_MESSAGE_TARGET_SAMPLER            2
-#define BRW_MESSAGE_TARGET_GATEWAY            3
-#define BRW_MESSAGE_TARGET_DATAPORT_READ      4
-#define BRW_MESSAGE_TARGET_DATAPORT_WRITE     5
-#define BRW_MESSAGE_TARGET_URB                6
-#define BRW_MESSAGE_TARGET_THREAD_SPAWNER     7
-
-#define GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE  4
-#define GEN6_MESSAGE_TARGET_DP_RENDER_CACHE   5
-#define GEN6_MESSAGE_TARGET_DP_CONST_CACHE    9
+/**
+ * Message target: Shared Function ID for where to SEND a message.
+ *
+ * These are enumerated in the ISA reference under "send - Send Message".
+ * In particular, see the following tables:
+ * - G45 PRM, Volume 4, Table 14-15 "Message Descriptor Definition"
+ * - Sandybridge PRM, Volume 4 Part 2, Table 8-16 "Extended Message Descriptor"
+ * - BSpec, Volume 1a (GPU Overview) / Graphics Processing Engine (GPE) /
+ *   Overview / GPE Function IDs
+ */
+enum brw_message_target {
+   BRW_SFID_NULL                     = 0,
+   BRW_SFID_MATH                     = 1, /* Only valid on Gen4-5 */
+   BRW_SFID_SAMPLER                  = 2,
+   BRW_SFID_MESSAGE_GATEWAY          = 3,
+   BRW_SFID_DATAPORT_READ            = 4,
+   BRW_SFID_DATAPORT_WRITE           = 5,
+   BRW_SFID_URB                      = 6,
+   BRW_SFID_THREAD_SPAWNER           = 7,
+
+   GEN6_SFID_DATAPORT_SAMPLER_CACHE  = 4,
+   GEN6_SFID_DATAPORT_RENDER_CACHE   = 5,
+   GEN6_SFID_DATAPORT_CONSTANT_CACHE = 9,
+
+   GEN7_SFID_DATAPORT_DATA_CACHE     = 10,
+};
 
 #define GEN7_MESSAGE_TARGET_DP_DATA_CACHE     10
 
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 57821066941..515fd7bcd1a 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -299,26 +299,27 @@ char *end_of_thread[2] = {
 };
 
 char *target_function[16] = {
-    [BRW_MESSAGE_TARGET_NULL] = "null",
-    [BRW_MESSAGE_TARGET_MATH] = "math",
-    [BRW_MESSAGE_TARGET_SAMPLER] = "sampler",
-    [BRW_MESSAGE_TARGET_GATEWAY] = "gateway",
-    [BRW_MESSAGE_TARGET_DATAPORT_READ] = "read",
-    [BRW_MESSAGE_TARGET_DATAPORT_WRITE] = "write",
-    [BRW_MESSAGE_TARGET_URB] = "urb",
-    [BRW_MESSAGE_TARGET_THREAD_SPAWNER] = "thread_spawner"
+    [BRW_SFID_NULL] = "null",
+    [BRW_SFID_MATH] = "math",
+    [BRW_SFID_SAMPLER] = "sampler",
+    [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
+    [BRW_SFID_DATAPORT_READ] = "read",
+    [BRW_SFID_DATAPORT_WRITE] = "write",
+    [BRW_SFID_URB] = "urb",
+    [BRW_SFID_THREAD_SPAWNER] = "thread_spawner"
 };
 
 char *target_function_gen6[16] = {
-    [BRW_MESSAGE_TARGET_NULL] = "null",
-    [BRW_MESSAGE_TARGET_MATH] = "math",
-    [BRW_MESSAGE_TARGET_SAMPLER] = "sampler",
-    [BRW_MESSAGE_TARGET_GATEWAY] = "gateway",
-    [GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE] = "sampler",
-    [GEN6_MESSAGE_TARGET_DP_RENDER_CACHE] = "render",
-    [GEN6_MESSAGE_TARGET_DP_CONST_CACHE] = "const",
-    [BRW_MESSAGE_TARGET_URB] = "urb",
-    [BRW_MESSAGE_TARGET_THREAD_SPAWNER] = "thread_spawner"
+    [BRW_SFID_NULL] = "null",
+    [BRW_SFID_MATH] = "math",
+    [BRW_SFID_SAMPLER] = "sampler",
+    [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
+    [BRW_SFID_URB] = "urb",
+    [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
+    [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
+    [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
+    [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
+    [GEN7_SFID_DATAPORT_DATA_CACHE] = "data"
 };
 
 char *dp_rc_msg_type_gen6[16] = {
@@ -944,7 +945,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 
     if (inst->header.opcode == BRW_OPCODE_SEND ||
 	inst->header.opcode == BRW_OPCODE_SENDC) {
-	int target;
+	enum brw_message_target target;
 
 	if (gen >= 6)
 	    target = inst->header.destreg__conditionalmod;
@@ -966,7 +967,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 	}
 
 	switch (target) {
-	case BRW_MESSAGE_TARGET_MATH:
+	case BRW_SFID_MATH:
 	    err |= control (file, "math function", math_function,
 			    inst->bits3.math.function, &space);
 	    err |= control (file, "math saturate", math_saturate,
@@ -978,7 +979,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 	    err |= control (file, "math precision", math_precision,
 			    inst->bits3.math.precision, &space);
 	    break;
-	case BRW_MESSAGE_TARGET_SAMPLER:
+	case BRW_SFID_SAMPLER:
 	    if (gen >= 5) {
 		format (file, " (%d, %d, %d, %d)",
 			inst->bits3.sampler_gen5.binding_table_index,
@@ -999,7 +1000,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 		string (file, ")");
 	    }
 	    break;
-	case BRW_MESSAGE_TARGET_DATAPORT_READ:
+	case BRW_SFID_DATAPORT_READ:
 	    if (gen >= 6) {
 		format (file, " (%d, %d, %d, %d, %d, %d)",
 			inst->bits3.gen6_dp.binding_table_index,
@@ -1021,7 +1022,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 	    }
 	    break;
 
-	case BRW_MESSAGE_TARGET_DATAPORT_WRITE:
+	case BRW_SFID_DATAPORT_WRITE:
 	    if (gen >= 6) {
 		format (file, " (");
 
@@ -1046,7 +1047,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 	    }
 	    break;
 
-	case BRW_MESSAGE_TARGET_URB:
+	case BRW_SFID_URB:
 	    if (gen >= 5) {
 		format (file, " %d", inst->bits3.urb_gen5.offset);
 	    } else {
@@ -1072,7 +1073,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
 			inst->bits3.urb_gen5.response_length);
 	    }
 	    break;
-	case BRW_MESSAGE_TARGET_THREAD_SPAWNER:
+	case BRW_SFID_THREAD_SPAWNER:
 	    break;
 	default:
 	    format (file, "unsupported target %d", target);
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 7773cff9217..d50ad173304 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -421,7 +421,7 @@ static void brw_set_math_message( struct brw_compile *p,
       insn->bits3.math_gen5.response_length = response_length;
       insn->bits3.math_gen5.msg_length = msg_length;
       insn->bits3.math_gen5.end_of_thread = 0;
-      insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_MATH;
+      insn->bits2.send_gen5.sfid = BRW_SFID_MATH;
       insn->bits2.send_gen5.end_of_thread = 0;
    } else {
       insn->bits3.math.function = function;
@@ -431,7 +431,7 @@ static void brw_set_math_message( struct brw_compile *p,
       insn->bits3.math.data_type = dataType;
       insn->bits3.math.response_length = response_length;
       insn->bits3.math.msg_length = msg_length;
-      insn->bits3.math.msg_target = BRW_MESSAGE_TARGET_MATH;
+      insn->bits3.math.msg_target = BRW_SFID_MATH;
       insn->bits3.math.end_of_thread = 0;
    }
 }
@@ -458,9 +458,9 @@ static void brw_set_ff_sync_message(struct brw_compile *p,
    insn->bits3.urb_gen5.msg_length = 1;
    insn->bits3.urb_gen5.end_of_thread = end_of_thread;
    if (intel->gen >= 6) {
-      insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_URB;
+      insn->header.destreg__conditionalmod = BRW_SFID_URB;
    } else {
-      insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB;
+      insn->bits2.send_gen5.sfid = BRW_SFID_URB;
       insn->bits2.send_gen5.end_of_thread = end_of_thread;
    }
 }
@@ -492,7 +492,7 @@ static void brw_set_urb_message( struct brw_compile *p,
       insn->bits3.urb_gen7.response_length = response_length;
       insn->bits3.urb_gen7.msg_length = msg_length;
       insn->bits3.urb_gen7.end_of_thread = end_of_thread;
-      insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_URB;
+      insn->header.destreg__conditionalmod = BRW_SFID_URB;
    } else if (intel->gen >= 5) {
       insn->bits3.urb_gen5.opcode = 0;	/* URB_WRITE */
       insn->bits3.urb_gen5.offset = offset;
@@ -509,9 +509,9 @@ static void brw_set_urb_message( struct brw_compile *p,
 	  * EOT stayed in bits3 above.  Does the EOT bit setting
 	  * below on Ironlake even do anything?
 	  */
-	 insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_URB;
+	 insn->header.destreg__conditionalmod = BRW_SFID_URB;
       } else {
-	 insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB;
+	 insn->bits2.send_gen5.sfid = BRW_SFID_URB;
 	 insn->bits2.send_gen5.end_of_thread = end_of_thread;
       }
    } else {
@@ -523,7 +523,7 @@ static void brw_set_urb_message( struct brw_compile *p,
       insn->bits3.urb.complete = complete;
       insn->bits3.urb.response_length = response_length;
       insn->bits3.urb.msg_length = msg_length;
-      insn->bits3.urb.msg_target = BRW_MESSAGE_TARGET_URB;
+      insn->bits3.urb.msg_target = BRW_SFID_URB;
       insn->bits3.urb.end_of_thread = end_of_thread;
    }
 }
@@ -547,9 +547,9 @@ brw_set_dp_write_message(struct brw_compile *p,
 
    if (intel->gen >= 7) {
       /* Use the Render Cache for RT writes; otherwise use the Data Cache */
-      unsigned sfid = GEN7_MESSAGE_TARGET_DP_DATA_CACHE;
+      unsigned sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
       if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE)
-	 sfid = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE;
+	 sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
 
       insn->header.destreg__conditionalmod = sfid;
 
@@ -573,7 +573,7 @@ brw_set_dp_write_message(struct brw_compile *p,
       insn->bits3.gen6_dp.end_of_thread = end_of_thread;
 
       /* We always use the render cache for write messages */
-      insn->header.destreg__conditionalmod = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE;
+      insn->header.destreg__conditionalmod = GEN6_SFID_DATAPORT_RENDER_CACHE;
    } else if (intel->gen == 5) {
       insn->bits3.dp_write_gen5.binding_table_index = binding_table_index;
       insn->bits3.dp_write_gen5.msg_control = msg_control;
@@ -584,7 +584,7 @@ brw_set_dp_write_message(struct brw_compile *p,
       insn->bits3.dp_write_gen5.response_length = response_length;
       insn->bits3.dp_write_gen5.msg_length = msg_length;
       insn->bits3.dp_write_gen5.end_of_thread = end_of_thread;
-      insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
+      insn->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_WRITE;
       insn->bits2.send_gen5.end_of_thread = end_of_thread;
    } else {
       insn->bits3.dp_write.binding_table_index = binding_table_index;
@@ -594,7 +594,7 @@ brw_set_dp_write_message(struct brw_compile *p,
       insn->bits3.dp_write.send_commit_msg = send_commit_msg;
       insn->bits3.dp_write.response_length = response_length;
       insn->bits3.dp_write.msg_length = msg_length;
-      insn->bits3.dp_write.msg_target = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
+      insn->bits3.dp_write.msg_target = BRW_SFID_DATAPORT_WRITE;
       insn->bits3.dp_write.end_of_thread = end_of_thread;
    }
 }
@@ -622,14 +622,14 @@ brw_set_dp_read_message(struct brw_compile *p,
       insn->bits3.gen7_dp.response_length = response_length;
       insn->bits3.gen7_dp.msg_length = msg_length;
       insn->bits3.gen7_dp.end_of_thread = 0;
-      insn->header.destreg__conditionalmod = GEN7_MESSAGE_TARGET_DP_DATA_CACHE;
+      insn->header.destreg__conditionalmod = GEN7_SFID_DATAPORT_DATA_CACHE;
    } else if (intel->gen == 6) {
       uint32_t target_function;
 
       if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE)
-	 target_function = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE;
+	 target_function = GEN6_SFID_DATAPORT_RENDER_CACHE;
       else
-	 target_function = GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE;
+	 target_function = GEN6_SFID_DATAPORT_SAMPLER_CACHE;
 
       insn->bits3.gen6_dp.binding_table_index = binding_table_index;
       insn->bits3.gen6_dp.msg_control = msg_control;
@@ -651,7 +651,7 @@ brw_set_dp_read_message(struct brw_compile *p,
       insn->bits3.dp_read_gen5.msg_length = msg_length;
       insn->bits3.dp_read_gen5.pad1 = 0;
       insn->bits3.dp_read_gen5.end_of_thread = 0;
-      insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_DATAPORT_READ;
+      insn->bits2.send_gen5.sfid = BRW_SFID_DATAPORT_READ;
       insn->bits2.send_gen5.end_of_thread = 0;
    } else if (intel->is_g4x) {
       insn->bits3.dp_read_g4x.binding_table_index = binding_table_index; /*0:7*/
@@ -660,7 +660,7 @@ brw_set_dp_read_message(struct brw_compile *p,
       insn->bits3.dp_read_g4x.target_cache = target_cache;  /*14:15*/
       insn->bits3.dp_read_g4x.response_length = response_length;  /*16:19*/
       insn->bits3.dp_read_g4x.msg_length = msg_length;  /*20:23*/
-      insn->bits3.dp_read_g4x.msg_target = BRW_MESSAGE_TARGET_DATAPORT_READ; /*24:27*/
+      insn->bits3.dp_read_g4x.msg_target = BRW_SFID_DATAPORT_READ; /*24:27*/
       insn->bits3.dp_read_g4x.pad1 = 0;
       insn->bits3.dp_read_g4x.end_of_thread = 0;
    } else {
@@ -670,7 +670,7 @@ brw_set_dp_read_message(struct brw_compile *p,
       insn->bits3.dp_read.target_cache = target_cache;  /*14:15*/
       insn->bits3.dp_read.response_length = response_length;  /*16:19*/
       insn->bits3.dp_read.msg_length = msg_length;  /*20:23*/
-      insn->bits3.dp_read.msg_target = BRW_MESSAGE_TARGET_DATAPORT_READ; /*24:27*/
+      insn->bits3.dp_read.msg_target = BRW_SFID_DATAPORT_READ; /*24:27*/
       insn->bits3.dp_read.pad1 = 0;  /*28:30*/
       insn->bits3.dp_read.end_of_thread = 0;  /*31*/
    }
@@ -701,7 +701,7 @@ static void brw_set_sampler_message(struct brw_compile *p,
       insn->bits3.sampler_gen7.response_length = response_length;
       insn->bits3.sampler_gen7.msg_length = msg_length;
       insn->bits3.sampler_gen7.end_of_thread = eot;
-      insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_SAMPLER;
+      insn->header.destreg__conditionalmod = BRW_SFID_SAMPLER;
    } else if (intel->gen >= 5) {
       insn->bits3.sampler_gen5.binding_table_index = binding_table_index;
       insn->bits3.sampler_gen5.sampler = sampler;
@@ -712,9 +712,9 @@ static void brw_set_sampler_message(struct brw_compile *p,
       insn->bits3.sampler_gen5.msg_length = msg_length;
       insn->bits3.sampler_gen5.end_of_thread = eot;
       if (intel->gen >= 6)
-	  insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_SAMPLER;
+	  insn->header.destreg__conditionalmod = BRW_SFID_SAMPLER;
       else {
-	  insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_SAMPLER;
+	  insn->bits2.send_gen5.sfid = BRW_SFID_SAMPLER;
 	  insn->bits2.send_gen5.end_of_thread = eot;
       }
    } else if (intel->is_g4x) {
@@ -724,7 +724,7 @@ static void brw_set_sampler_message(struct brw_compile *p,
       insn->bits3.sampler_g4x.response_length = response_length;
       insn->bits3.sampler_g4x.msg_length = msg_length;
       insn->bits3.sampler_g4x.end_of_thread = eot;
-      insn->bits3.sampler_g4x.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
+      insn->bits3.sampler_g4x.msg_target = BRW_SFID_SAMPLER;
    } else {
       insn->bits3.sampler.binding_table_index = binding_table_index;
       insn->bits3.sampler.sampler = sampler;
@@ -733,7 +733,7 @@ static void brw_set_sampler_message(struct brw_compile *p,
       insn->bits3.sampler.response_length = response_length;
       insn->bits3.sampler.msg_length = msg_length;
       insn->bits3.sampler.end_of_thread = eot;
-      insn->bits3.sampler.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
+      insn->bits3.sampler.msg_target = BRW_SFID_SAMPLER;
    }
 }