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authorIan Romanick <[email protected]>2012-07-12 13:52:06 -0700
committerIan Romanick <[email protected]>2012-10-29 09:55:42 -0700
commit1f6e10f67b0fce811eb91abfbdb3e9c6ed0035a3 (patch)
tree6a4aad0d93d6ee04a9d9c6fe6503ff25988990a3 /src/mesa
parent43d6fe156b2bf9754aaa65776e001c927275d765 (diff)
dri: Convert driCreateConfigs to use a gl_format enum
This is instead of the pair of GLenums for format and type that were previously used. This is necessary for the Intel drivers to expose sRGB framebuffer formats. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/common/utils.c140
-rw-r--r--src/mesa/drivers/dri/common/utils.h2
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c35
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_screen.c16
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c20
-rw-r--r--src/mesa/drivers/dri/swrast/swrast.c14
6 files changed, 74 insertions, 153 deletions
diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c
index 5117ff70a0f..92bad55e9e3 100644
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -31,6 +31,7 @@
#include <string.h>
#include <stdlib.h>
+#include <stdbool.h>
#include "main/mtypes.h"
#include "main/cpuinfo.h"
#include "main/extensions.h"
@@ -185,117 +186,56 @@ driGetRendererString( char * buffer, const char * hardware_name,
* \c GL_4HALF_16_16_16_16, etc. We can cross that bridge when we come to it.
*/
__DRIconfig **
-driCreateConfigs(GLenum fb_format, GLenum fb_type,
+driCreateConfigs(gl_format format,
const uint8_t * depth_bits, const uint8_t * stencil_bits,
unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes,
const uint8_t * msaa_samples, unsigned num_msaa_modes,
GLboolean enable_accum)
{
- static const uint8_t bits_table[4][4] = {
- /* R G B A */
- { 5, 6, 5, 0 }, /* Any GL_UNSIGNED_SHORT_5_6_5 */
- { 8, 8, 8, 0 }, /* Any RGB with any GL_UNSIGNED_INT_8_8_8_8 */
- { 8, 8, 8, 8 } /* Any RGBA with any GL_UNSIGNED_INT_8_8_8_8 */
+ static const uint32_t masks_table[][4] = {
+ /* MESA_FORMAT_RGB565 */
+ { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 },
+ /* MESA_FORMAT_XRGB8888 */
+ { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 },
+ /* MESA_FORMAT_ARGB8888 */
+ { 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 },
};
- static const uint32_t masks_table_rgb[6][4] = {
- { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5 */
- { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5_REV */
- { 0xFF000000, 0x00FF0000, 0x0000FF00, 0x00000000 }, /* 8_8_8_8 */
- { 0x000000FF, 0x0000FF00, 0x00FF0000, 0x00000000 } /* 8_8_8_8_REV */
- };
-
- static const uint32_t masks_table_rgba[6][4] = {
- { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5 */
- { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5_REV */
- { 0xFF000000, 0x00FF0000, 0x0000FF00, 0x000000FF }, /* 8_8_8_8 */
- { 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000 }, /* 8_8_8_8_REV */
- };
-
- static const uint32_t masks_table_bgr[6][4] = {
- { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5 */
- { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5_REV */
- { 0x0000FF00, 0x00FF0000, 0xFF000000, 0x00000000 }, /* 8_8_8_8 */
- { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }, /* 8_8_8_8_REV */
- };
-
- static const uint32_t masks_table_bgra[6][4] = {
- { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5 */
- { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5_REV */
- { 0x0000FF00, 0x00FF0000, 0xFF000000, 0x000000FF }, /* 8_8_8_8 */
- { 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 }, /* 8_8_8_8_REV */
- };
-
- const uint8_t * bits;
const uint32_t * masks;
- int index;
__DRIconfig **configs, **c;
struct gl_config *modes;
unsigned i, j, k, h;
unsigned num_modes;
unsigned num_accum_bits = (enable_accum) ? 2 : 1;
-
- switch ( fb_type ) {
- case GL_UNSIGNED_SHORT_5_6_5:
- index = 0;
- break;
- case GL_UNSIGNED_SHORT_5_6_5_REV:
- index = 1;
- break;
- case GL_UNSIGNED_INT_8_8_8_8:
- index = 2;
- break;
- case GL_UNSIGNED_INT_8_8_8_8_REV:
- index = 3;
- break;
- default:
- fprintf( stderr, "[%s:%u] Unknown framebuffer type 0x%04x.\n",
- __FUNCTION__, __LINE__, fb_type );
- return NULL;
- }
-
-
- /* Valid types are GL_UNSIGNED_SHORT_5_6_5 and GL_UNSIGNED_INT_8_8_8_8 and
- * the _REV versions.
- *
- * Valid formats are GL_RGBA, GL_RGB, and GL_BGRA.
- */
-
- switch ( fb_format ) {
- case GL_RGB:
- masks = masks_table_rgb[ index ];
- break;
-
- case GL_RGBA:
- masks = masks_table_rgba[ index ];
- break;
-
- case GL_BGR:
- masks = masks_table_bgr[ index ];
- break;
-
- case GL_BGRA:
- masks = masks_table_bgra[ index ];
- break;
-
- default:
- fprintf( stderr, "[%s:%u] Unknown framebuffer format 0x%04x.\n",
- __FUNCTION__, __LINE__, fb_format );
- return NULL;
+ int red_bits;
+ int green_bits;
+ int blue_bits;
+ int alpha_bits;
+ bool is_srgb;
+
+ switch (format) {
+ case MESA_FORMAT_RGB565:
+ masks = masks_table[0];
+ break;
+ case MESA_FORMAT_XRGB8888:
+ masks = masks_table[1];
+ break;
+ case MESA_FORMAT_ARGB8888:
+ masks = masks_table[2];
+ break;
+ default:
+ fprintf(stderr, "[%s:%u] Unknown framebuffer type %s (%d).\n",
+ __FUNCTION__, __LINE__,
+ _mesa_get_format_name(format), format);
+ return NULL;
}
- switch ( index ) {
- case 0:
- case 1:
- bits = bits_table[0];
- break;
- default:
- bits = ((fb_format == GL_RGB) || (fb_format == GL_BGR))
- ? bits_table[1]
- : bits_table[2];
- break;
- }
+ red_bits = _mesa_get_format_bits(format, GL_RED_BITS);
+ green_bits = _mesa_get_format_bits(format, GL_GREEN_BITS);
+ blue_bits = _mesa_get_format_bits(format, GL_BLUE_BITS);
+ alpha_bits = _mesa_get_format_bits(format, GL_ALPHA_BITS);
+ is_srgb = false;
num_modes = num_depth_stencil_bits * num_db_modes * num_accum_bits * num_msaa_modes;
configs = calloc(1, (num_modes + 1) * sizeof *configs);
@@ -312,10 +252,10 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type,
c++;
memset(modes, 0, sizeof *modes);
- modes->redBits = bits[0];
- modes->greenBits = bits[1];
- modes->blueBits = bits[2];
- modes->alphaBits = bits[3];
+ modes->redBits = red_bits;
+ modes->greenBits = green_bits;
+ modes->blueBits = blue_bits;
+ modes->alphaBits = alpha_bits;
modes->redMask = masks[0];
modes->greenMask = masks[1];
modes->blueMask = masks[2];
@@ -367,7 +307,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type,
__DRI_ATTRIB_TEXTURE_2D_BIT |
__DRI_ATTRIB_TEXTURE_RECTANGLE_BIT;
- modes->sRGBCapable = GL_FALSE;
+ modes->sRGBCapable = is_srgb;
}
}
}
diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h
index 9d6eb3037c6..e3b3940da30 100644
--- a/src/mesa/drivers/dri/common/utils.h
+++ b/src/mesa/drivers/dri/common/utils.h
@@ -48,7 +48,7 @@ struct __DRIconfigRec {
};
extern __DRIconfig **
-driCreateConfigs(GLenum fb_format, GLenum fb_type,
+driCreateConfigs(gl_format format,
const uint8_t * depth_bits, const uint8_t * stencil_bits,
unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes,
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index b4992e1ad7a..01126490a96 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -912,6 +912,12 @@ intel_detect_swizzling(struct intel_screen *screen)
static __DRIconfig**
intel_screen_make_configs(__DRIscreen *dri_screen)
{
+ static const gl_format formats[3] = {
+ MESA_FORMAT_RGB565,
+ MESA_FORMAT_XRGB8888,
+ MESA_FORMAT_ARGB8888
+ };
+
/* GLX_SWAP_COPY_OML is not supported due to page flipping. */
static const GLenum back_buffer_modes[] = {
GLX_SWAP_UNDEFINED_OML, GLX_NONE,
@@ -921,22 +927,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
static const uint8_t multisample_samples[2] = {4, 8};
struct intel_screen *screen = dri_screen->driverPrivate;
- GLenum fb_format[3];
- GLenum fb_type[3];
uint8_t depth_bits[4], stencil_bits[4];
__DRIconfig **configs = NULL;
- fb_format[0] = GL_RGB;
- fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
-
- fb_format[1] = GL_BGR;
- fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
- fb_format[2] = GL_BGRA;
- fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
/* Generate singlesample configs without accumulation buffer. */
- for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
+ for (int i = 0; i < ARRAY_SIZE(formats); i++) {
__DRIconfig **new_configs;
const int num_depth_stencil_bits = 2;
@@ -947,7 +942,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits[0] = 0;
stencil_bits[0] = 0;
- if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
+ if (formats[i] == MESA_FORMAT_RGB565) {
depth_bits[1] = 16;
stencil_bits[1] = 0;
} else {
@@ -955,7 +950,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
stencil_bits[1] = 8;
}
- new_configs = driCreateConfigs(fb_format[i], fb_type[i],
+ new_configs = driCreateConfigs(formats[i],
depth_bits,
stencil_bits,
num_depth_stencil_bits,
@@ -968,10 +963,10 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
/* Generate the minimum possible set of configs that include an
* accumulation buffer.
*/
- for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
+ for (int i = 0; i < ARRAY_SIZE(formats); i++) {
__DRIconfig **new_configs;
- if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
+ if (formats[i] == MESA_FORMAT_RGB565) {
depth_bits[0] = 16;
stencil_bits[0] = 0;
} else {
@@ -979,7 +974,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
stencil_bits[0] = 8;
}
- new_configs = driCreateConfigs(fb_format[i], fb_type[i],
+ new_configs = driCreateConfigs(formats[i],
depth_bits, stencil_bits, 1,
back_buffer_modes, 1,
singlesample_samples, 1,
@@ -1000,7 +995,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
* supported. Singlebuffer configs are not supported because no one wants
* them.
*/
- for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
+ for (int i = 0; i < ARRAY_SIZE(formats); i++) {
if (screen->gen < 6)
break;
@@ -1011,7 +1006,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits[0] = 0;
stencil_bits[0] = 0;
- if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
+ if (formats[i] == MESA_FORMAT_RGB565) {
depth_bits[1] = 16;
stencil_bits[1] = 0;
} else {
@@ -1024,7 +1019,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
else if (screen->gen == 6)
num_msaa_modes = 1;
- new_configs = driCreateConfigs(fb_format[i], fb_type[i],
+ new_configs = driCreateConfigs(formats[i],
depth_bits,
stencil_bits,
num_depth_stencil_bits,
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
index 4f78a82846d..dc6d758f771 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
@@ -52,24 +52,20 @@ nouveau_get_configs(void)
const uint8_t stencil_bits[] = { 0, 0, 0, 8 };
const uint8_t msaa_samples[] = { 0 };
- const struct {
- GLenum format;
- GLenum type;
- } fb_formats[] = {
- { GL_RGB , GL_UNSIGNED_SHORT_5_6_5 },
- { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV },
- { GL_BGR , GL_UNSIGNED_INT_8_8_8_8_REV },
+ static const gl_format formats[3] = {
+ MESA_FORMAT_RGB565,
+ MESA_FORMAT_ARGB8888,
+ MESA_FORMAT_XRGB8888,
};
const GLenum back_buffer_modes[] = {
GLX_NONE, GLX_SWAP_UNDEFINED_OML
};
- for (i = 0; i < Elements(fb_formats); i++) {
+ for (i = 0; i < Elements(formats); i++) {
__DRIconfig **config;
- config = driCreateConfigs(fb_formats[i].format,
- fb_formats[i].type,
+ config = driCreateConfigs(formats[i],
depth_bits, stencil_bits,
Elements(depth_bits),
back_buffer_modes,
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 52247a9e726..6f4750a02ff 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -710,8 +710,11 @@ radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
static const
__DRIconfig **radeonInitScreen2(__DRIscreen *psp)
{
- GLenum fb_format[3];
- GLenum fb_type[3];
+ static const gl_format formats[3] = {
+ MESA_FORMAT_RGB565,
+ MESA_FORMAT_XRGB8888,
+ MESA_FORMAT_ARGB8888
+ };
/* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
* support pageflipping at all.
*/
@@ -736,19 +739,10 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
msaa_samples_array[0] = 0;
- fb_format[0] = GL_RGB;
- fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
-
- fb_format[1] = GL_BGR;
- fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
- fb_format[2] = GL_BGRA;
- fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
- for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
+ for (color = 0; color < ARRAY_SIZE(formats); color++) {
__DRIconfig **new_configs;
- new_configs = driCreateConfigs(fb_format[color], fb_type[color],
+ new_configs = driCreateConfigs(formats[color],
depth_bits,
stencil_bits,
ARRAY_SIZE(depth_bits),
diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
index c608bcdc6eb..eeeb81c0159 100644
--- a/src/mesa/drivers/dri/swrast/swrast.c
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -125,8 +125,7 @@ swrastFillInModes(__DRIscreen *psp,
__DRIconfig **configs;
unsigned depth_buffer_factor;
unsigned back_buffer_factor;
- GLenum fb_format;
- GLenum fb_type;
+ gl_format format;
/* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
* support pageflipping at all.
@@ -162,16 +161,13 @@ swrastFillInModes(__DRIscreen *psp,
switch (pixel_bits) {
case 16:
- fb_format = GL_RGB;
- fb_type = GL_UNSIGNED_SHORT_5_6_5;
+ format = MESA_FORMAT_RGB565;
break;
case 24:
- fb_format = GL_BGR;
- fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+ format = MESA_FORMAT_XRGB8888;
break;
case 32:
- fb_format = GL_BGRA;
- fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+ format = MESA_FORMAT_ARGB8888;
break;
default:
fprintf(stderr, "[%s:%u] bad depth %d\n", __func__, __LINE__,
@@ -179,7 +175,7 @@ swrastFillInModes(__DRIscreen *psp,
return NULL;
}
- configs = driCreateConfigs(fb_format, fb_type,
+ configs = driCreateConfigs(format,
depth_bits_array, stencil_bits_array,
depth_buffer_factor, back_buffer_modes,
back_buffer_factor, msaa_samples_array, 1,