diff options
| author | Eric Anholt <[email protected]> | 2013-03-18 15:38:58 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2013-03-20 10:18:44 -0700 |
| commit | 1f112ccf02adaf35317a356f40a71b16de637f97 (patch) | |
| tree | d400e9816684eaf5c0e526a62a34ba6089728d8e /src/mesa/x86/sse_normal.S | |
| parent | 529dbbfcf7a674f2d82eed5e88ce92615721d5f2 (diff) | |
i965/gen7: Align all depth miplevels to 8 in the X direction.
On an INTEL_DEBUG=perf piglit run on IVB, reduces the instances of "HW
workaround: blit" (the printouts from the misaligned-depth workaround
blits) from 725 to 675.
It doesn't totally eliminate the workaround blit, because we still have
problems with Y offsets that we can't fix (since texturing can only align
miplevels up to 2 or 4, not 8).
No regressions on piglit/es3conform on IVB.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/x86/sse_normal.S')
0 files changed, 0 insertions, 0 deletions