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authorBryan Cain <bryancain3@gmail.com>2013-04-17 15:55:46 -0500
committerMaarten Lankhorst <maarten.lankhorst@canonical.com>2014-01-27 16:40:42 +0100
commitb3f82e1a63e8a58f0e7ac297fc5e94ebe76c3339 (patch)
treea562a31522d0edb8027c6c33b52a188370aa6132 /src/mesa/tnl_dd
parent67250acbaba924ccaab696f2b348dfa898c41d0b (diff)
nv50/ir: delay calculation of indirect addresses
Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL instructions, emit the shift when the loaded address is actually used. This is necessary because input vertex and attribute indices in geometry shaders on nv50 need to be shifted left by 2 instead of 4. Signed-off-by: Bryan Cain <bryancain3@gmail.com> [calim: various updates to the indirect address logic] Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at> [imirkin: remove OP_MAD change that calim made, add OP_RESTART handling same as OP_EMIT for code flow analysis] Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/mesa/tnl_dd')
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