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| author | Francisco Jerez <[email protected]> | 2015-08-06 14:04:00 +0300 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2015-08-06 14:12:12 +0300 |
| commit | 3b48a0eeda20f5cf2dbc8de5e36f8fe3461f41bf (patch) | |
| tree | 5b28c4047b1572e5782303664c28c9b88b7beaaf /src/mesa/tnl/t_vertex_sse.c | |
| parent | 2e731264382954beb1192cd7cc62e16e0b8e7978 (diff) | |
i965/fs: Lower the MULH virtual instruction.
Translate MULH into the MUL/MACH sequence. This does roughly the same
thing that nir_emit_alu() used to do but we can now handle 16-wide by
taking advantage of the SIMD lowering pass. The force_sechalf
workaround near the bottom is required because the SIMD lowering pass
will emit instructions with non-zero quarter control and we need to
make sure we avoid that on integer arithmetic instructions with
implicit accumulator access due to a known hardware bug on IVB.
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/tnl/t_vertex_sse.c')
0 files changed, 0 insertions, 0 deletions