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authorBrian Paul <[email protected]>2005-12-08 14:50:03 +0000
committerBrian Paul <[email protected]>2005-12-08 14:50:03 +0000
commit91ed68b2b9e0fcb70675ee575d805612a675a82c (patch)
tree8512767a937cc044e44a1b5887a3dab1f044ce68 /src/mesa/tnl/t_vb_arbprogram.c
parent5262c225ba9eb90fc2a357c40a93a5bba2dd602a (diff)
do away with 'long long' usage
Diffstat (limited to 'src/mesa/tnl/t_vb_arbprogram.c')
-rw-r--r--src/mesa/tnl/t_vb_arbprogram.c23
1 files changed, 11 insertions, 12 deletions
diff --git a/src/mesa/tnl/t_vb_arbprogram.c b/src/mesa/tnl/t_vb_arbprogram.c
index 2f6efae7965..4bd8e8c8bec 100644
--- a/src/mesa/tnl/t_vb_arbprogram.c
+++ b/src/mesa/tnl/t_vb_arbprogram.c
@@ -749,7 +749,7 @@ static void (* const opcode_func[MAX_OPCODE+3])(struct arb_vp_machine *, union i
static union instruction *cvp_next_instruction( struct compilation *cp )
{
union instruction *op = cp->csr++;
- op->dword = 0;
+ _mesa_bzero(op, sizeof(*op));
return op;
}
@@ -836,28 +836,29 @@ static struct reg cvp_emit_arg( struct compilation *cp,
/* Emit any necessary swizzling.
*/
- rsw.dword = 0;
+ _mesa_bzero(&rsw, sizeof(rsw));
rsw.rsw.neg = src->NegateBase ? WRITEMASK_XYZW : 0;
/* we're expecting 2-bit swizzles below... */
+#if 1 /* XXX THESE ASSERTIONS CURRENTLY FAIL DURING GLEAN TESTS! */
ASSERT(GET_SWZ(src->Swizzle, 0) < 4);
ASSERT(GET_SWZ(src->Swizzle, 1) < 4);
ASSERT(GET_SWZ(src->Swizzle, 2) < 4);
ASSERT(GET_SWZ(src->Swizzle, 3) < 4);
-
+#endif
rsw.rsw.swz = ((GET_SWZ(src->Swizzle, 0) << 0) |
(GET_SWZ(src->Swizzle, 1) << 2) |
(GET_SWZ(src->Swizzle, 2) << 4) |
(GET_SWZ(src->Swizzle, 3) << 6));
- noop.dword = 0;
+ _mesa_bzero(&noop, sizeof(noop));
noop.rsw.neg = 0;
noop.rsw.swz = RSW_NOOP;
- if (rsw.dword != noop.dword) {
+ if (_mesa_memcmp(&rsw, &noop, sizeof(rsw)) !=0) {
union instruction *op = cvp_next_instruction(cp);
struct reg rsw_reg = cvp_make_reg(FILE_REG, REG_ARG0 + arg);
- op->dword = rsw.dword;
+ *op = rsw;
op->rsw.opcode = RSW;
op->rsw.file0 = reg.file;
op->rsw.idx0 = reg.idx;
@@ -900,7 +901,7 @@ static GLuint cvp_choose_result( struct compilation *cp,
return REG_RES;
}
else {
- fixup->dword = 0;
+ _mesa_bzero(fixup, sizeof(*fixup));
cp->reg_active |= 1 << idx;
return idx;
}
@@ -955,8 +956,6 @@ static void cvp_emit_inst( struct compilation *cp,
struct reg reg[3];
GLuint result, nr_args, i;
- assert(sizeof(*op) == sizeof(MESA_LONGLONG));
-
/* Need to handle SWZ, ARL specially.
*/
switch (inst->Opcode) {
@@ -985,7 +984,7 @@ static void cvp_emit_inst( struct compilation *cp,
if (result == REG_RES) {
op = cvp_next_instruction(cp);
- op->dword = fixup.dword;
+ *op = fixup;
}
break;
@@ -1050,7 +1049,7 @@ static void cvp_emit_inst( struct compilation *cp,
if (result == REG_RES) {
op = cvp_next_instruction(cp);
- op->dword = fixup.dword;
+ *op = fixup;
}
break;
}
@@ -1074,7 +1073,7 @@ static void cvp_emit_inst( struct compilation *cp,
if (result == REG_RES) {
op = cvp_next_instruction(cp);
- op->dword = fixup.dword;
+ *op = fixup;
}
break;
}