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| author | Francisco Jerez <[email protected]> | 2015-08-05 16:43:37 +0300 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2015-08-06 14:12:12 +0300 |
| commit | f5b37fb1acad9cf044b7b6d4fa5f2582bd8bc7f4 (patch) | |
| tree | 41d69158b56da26d2e1d1ef73a2af390a9d779ca /src/mesa/tnl/t_pipeline.c | |
| parent | 8f5d0988ea2ccaba7f049f113b652f331524d2a6 (diff) | |
i965/fs: Lower 32x32 bit multiplication on BXT.
AFAIK BXT has the same annoying alignment limitation as CHV on the
source register regions of 32x32 bit MULs, give it the same treatment.
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/tnl/t_pipeline.c')
0 files changed, 0 insertions, 0 deletions