Merge branch 'draw-instanced'

Conflicts:
	src/gallium/auxiliary/draw/draw_llvm.c
	src/gallium/drivers/llvmpipe/lp_state_fs.c
	src/glsl/ir_set_program_inouts.cpp
	src/mesa/tnl/t_vb_program.c

2 files changed, 31 insertions, 0 deletions

diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index d240cab1a74..df4f5cf8b5c 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -461,4 +461,8 @@ void st_init_extensions(struct st_context *st)
    if (screen->get_param(screen, PIPE_CAP_SHADER_STENCIL_EXPORT)) {
       ctx->Extensions.ARB_shader_stencil_export = GL_TRUE;
    }
+
+   if (screen->get_param(screen, PIPE_CAP_INSTANCED_DRAWING)) {
+      ctx->Extensions.ARB_draw_instanced = GL_TRUE;
+   }
 }
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index f848462310e..42f1c2017f8 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -72,6 +72,7 @@ struct st_translate {
    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
    struct ureg_dst address[1];
    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
+   struct ureg_src systemValues[SYSTEM_VALUE_MAX];
 
    /* Extra info for handling point size clamping in vertex shader */
    struct ureg_dst pointSizeResult; /**< Actual point size output register */
@@ -104,6 +105,13 @@ struct st_translate {
 };
 
 
+/** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
+static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
+   TGSI_SEMANTIC_FACE,
+   TGSI_SEMANTIC_INSTANCEID
+};
+
+
 /**
  * Make note of a branch to a label in the TGSI code.
  * After we've emitted all instructions, we'll go over the list
@@ -245,6 +253,10 @@ src_register( struct st_translate *t,
    case PROGRAM_ADDRESS:
       return ureg_src(t->address[index]);
 
+   case PROGRAM_SYSTEM_VALUE:
+      assert(index < Elements(t->systemValues));
+      return t->systemValues[index];
+
    default:
       debug_assert( 0 );
       return ureg_src_undef();
@@ -1089,6 +1101,21 @@ st_translate_mesa_program(
       t->address[0] = ureg_DECL_address( ureg );
    }
 
+   /* Declare misc input registers
+    */
+   {
+      GLbitfield sysInputs = program->SystemValuesRead;
+      unsigned numSys = 0;
+      for (i = 0; sysInputs; i++) {
+         if (sysInputs & (1 << i)) {
+            unsigned semName = mesa_sysval_to_semantic[i];
+            t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
+            numSys++;
+            sysInputs &= ~(1 << i);
+         }
+      }
+   }
+
    if (program->IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) {
       /* If temps are accessed with indirect addressing, declare temporaries
        * in sequential order.  Else, we declare them on demand elsewhere.