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authorMatt Turner <[email protected]>2013-04-09 22:43:05 -0700
committerMatt Turner <[email protected]>2013-05-06 10:17:13 -0700
commitdafd050883660a42b2902388826cfecbfc9b8b83 (patch)
treeea6bba7a3f32ffab590953297a141c97148d1365 /src/mesa/state_tracker
parent9c04b8c28c3a8b60e896492fd1bccc923916c1c4 (diff)
glsl: Add a pass to lower bitfield-insert into bfm+bfi.
i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement bitfieldInsert() from ARB_gpu_shader5. v2: Add ir_binop_bfm and ir_triop_bfi to st_glsl_to_tgsi.cpp. Remove spurious temporary assignment and dereference. Reviewed-by: Chris Forbes <[email protected]>
Diffstat (limited to 'src/mesa/state_tracker')
-rw-r--r--src/mesa/state_tracker/st_glsl_to_tgsi.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index ad936bd20d0..ed314a0497f 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1973,6 +1973,8 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
case ir_unop_bit_count:
case ir_unop_find_msb:
case ir_unop_find_lsb:
+ case ir_binop_bfm:
+ case ir_triop_bfi:
case ir_triop_bitfield_extract:
case ir_quadop_bitfield_insert:
case ir_quadop_vector: