summaryrefslogtreecommitdiffstats
path: root/src/mesa/sparc
diff options
context:
space:
mode:
authorKenneth Graunke <[email protected]>2012-11-26 22:53:10 -0800
committerKenneth Graunke <[email protected]>2012-11-28 18:15:58 -0800
commiteda9726ef51dcfd3895924eb0f74df8e67aa9c3a (patch)
tree5114000f00254a07b7fe971028a463fa941cd6c6 /src/mesa/sparc
parentdb6231fece32a0cec6050ca570a04362036f4f48 (diff)
i965/vs: Split final assembly code generation out of vec4_visitor.
Compiling shaders requires several main steps: 1. Generating VS IR from either GLSL IR or Mesa IR 2. Optimizing the IR 3. Register allocation 4. Generating assembly code This patch splits out step 4 into a separate class named "vec4_generator." There are several reasons for doing so: 1. Future hardware has a different instruction encoding. Splitting this out will allow us to replace vec4_generator (which relies heavily on the brw_eu_emit.c code and struct brw_instruction) with a new code generator that writes the new format. 2. It reduces the size of the vec4_visitor monolith. (Arguably, a lot more should be split out, but that's left for "future work.") 3. Separate namespaces allow us to make helper functions for generating instructions in both classes: ADD() can exist in vec4_visitor and create IR, while ADD() in vec4_generator() can create brw_instructions. (Patches for this upcoming.) Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/sparc')
0 files changed, 0 insertions, 0 deletions