summaryrefslogtreecommitdiffstats
path: root/src/mesa/shader
diff options
context:
space:
mode:
authorBrian Paul <[email protected]>2008-11-07 10:17:31 -0700
committerBrian Paul <[email protected]>2008-11-07 10:17:31 -0700
commit3059ceb7f8128f00846f261f1927f5ec72d5dd15 (patch)
tree54a225dcfe71df372242437aaff922e771fb674c /src/mesa/shader
parent3225bc84932f08a52db7025367ae206a9d2f8fef (diff)
parenta98a25c25ff1ec3be74cf9c5f027b85a297c3e78 (diff)
Merge commit 'origin/master' into gallium-0.2
Diffstat (limited to 'src/mesa/shader')
-rw-r--r--src/mesa/shader/prog_execute.c285
-rw-r--r--src/mesa/shader/prog_instruction.c8
-rw-r--r--src/mesa/shader/prog_instruction.h8
-rw-r--r--src/mesa/shader/slang/slang_codegen.c3
-rw-r--r--src/mesa/shader/slang/slang_emit.c8
-rw-r--r--src/mesa/shader/slang/slang_ir.c8
-rw-r--r--src/mesa/shader/slang/slang_ir.h3
7 files changed, 295 insertions, 28 deletions
diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c
index cc084c535cc..914056d7456 100644
--- a/src/mesa/shader/prog_execute.c
+++ b/src/mesa/shader/prog_execute.c
@@ -220,6 +220,37 @@ fetch_vector4(const struct prog_src_register *source,
/**
+ * Fetch a 4-element uint vector from the given source register.
+ * Apply swizzling but not negation/abs.
+ */
+static void
+fetch_vector4ui(const struct prog_src_register *source,
+ const struct gl_program_machine *machine, GLuint result[4])
+{
+ const GLuint *src = (GLuint *) get_register_pointer(source, machine);
+ ASSERT(src);
+
+ if (source->Swizzle == SWIZZLE_NOOP) {
+ /* no swizzling */
+ COPY_4V(result, src);
+ }
+ else {
+ ASSERT(GET_SWZ(source->Swizzle, 0) <= 3);
+ ASSERT(GET_SWZ(source->Swizzle, 1) <= 3);
+ ASSERT(GET_SWZ(source->Swizzle, 2) <= 3);
+ ASSERT(GET_SWZ(source->Swizzle, 3) <= 3);
+ result[0] = src[GET_SWZ(source->Swizzle, 0)];
+ result[1] = src[GET_SWZ(source->Swizzle, 1)];
+ result[2] = src[GET_SWZ(source->Swizzle, 2)];
+ result[3] = src[GET_SWZ(source->Swizzle, 3)];
+ }
+
+ /* Note: no NegateBase, Abs, NegateAbs here */
+}
+
+
+
+/**
* Fetch the derivative with respect to X or Y for the given register.
* XXX this currently only works for fragment program input attribs.
*/
@@ -229,7 +260,8 @@ fetch_vector4_deriv(GLcontext * ctx,
const struct gl_program_machine *machine,
char xOrY, GLfloat result[4])
{
- if (source->File == PROGRAM_INPUT && source->Index < (GLint)machine->NumDeriv) {
+ if (source->File == PROGRAM_INPUT &&
+ source->Index < (GLint) machine->NumDeriv) {
const GLint col = machine->CurElement;
const GLfloat w = machine->Attribs[FRAG_ATTRIB_WPOS][col][3];
const GLfloat invQ = 1.0f / w;
@@ -494,6 +526,89 @@ store_vector4(const struct prog_instruction *inst,
/**
+ * Store 4 uints into a register. Observe the set-condition-code flags.
+ */
+static void
+store_vector4ui(const struct prog_instruction *inst,
+ struct gl_program_machine *machine, const GLuint value[4])
+{
+ const struct prog_dst_register *dest = &(inst->DstReg);
+ GLuint *dstReg;
+ GLuint dummyReg[4];
+ GLuint writeMask = dest->WriteMask;
+
+ switch (dest->File) {
+ case PROGRAM_OUTPUT:
+ ASSERT(dest->Index < MAX_PROGRAM_OUTPUTS);
+ dstReg = (GLuint *) machine->Outputs[dest->Index];
+ break;
+ case PROGRAM_TEMPORARY:
+ ASSERT(dest->Index < MAX_PROGRAM_TEMPS);
+ dstReg = (GLuint *) machine->Temporaries[dest->Index];
+ break;
+ case PROGRAM_WRITE_ONLY:
+ dstReg = dummyReg;
+ return;
+ default:
+ _mesa_problem(NULL, "bad register file in store_vector4(fp)");
+ return;
+ }
+
+ if (dest->CondMask != COND_TR) {
+ /* condition codes may turn off some writes */
+ if (writeMask & WRITEMASK_X) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 0)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_X;
+ }
+ if (writeMask & WRITEMASK_Y) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 1)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_Y;
+ }
+ if (writeMask & WRITEMASK_Z) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 2)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_Z;
+ }
+ if (writeMask & WRITEMASK_W) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 3)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_W;
+ }
+ }
+
+ if (writeMask & WRITEMASK_X)
+ dstReg[0] = value[0];
+ if (writeMask & WRITEMASK_Y)
+ dstReg[1] = value[1];
+ if (writeMask & WRITEMASK_Z)
+ dstReg[2] = value[2];
+ if (writeMask & WRITEMASK_W)
+ dstReg[3] = value[3];
+
+ if (inst->CondUpdate) {
+ if (writeMask & WRITEMASK_X)
+ machine->CondCodes[0] = generate_cc(value[0]);
+ if (writeMask & WRITEMASK_Y)
+ machine->CondCodes[1] = generate_cc(value[1]);
+ if (writeMask & WRITEMASK_Z)
+ machine->CondCodes[2] = generate_cc(value[2]);
+ if (writeMask & WRITEMASK_W)
+ machine->CondCodes[3] = generate_cc(value[3]);
+#if DEBUG_PROG
+ printf("CondCodes=(%s,%s,%s,%s) for:\n",
+ _mesa_condcode_string(machine->CondCodes[0]),
+ _mesa_condcode_string(machine->CondCodes[1]),
+ _mesa_condcode_string(machine->CondCodes[2]),
+ _mesa_condcode_string(machine->CondCodes[3]));
+#endif
+ }
+}
+
+
+
+/**
* Execute the given vertex/fragment program.
*
* \param ctx rendering context
@@ -572,6 +687,18 @@ _mesa_execute_program(GLcontext * ctx,
}
}
break;
+ case OPCODE_AND: /* bitwise AND */
+ {
+ GLuint a[4], b[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ fetch_vector4ui(&inst->SrcReg[1], machine, b);
+ result[0] = a[0] & b[0];
+ result[1] = a[1] & b[1];
+ result[2] = a[2] & b[2];
+ result[3] = a[3] & b[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
case OPCODE_ARL:
{
GLfloat t[4];
@@ -650,6 +777,33 @@ _mesa_execute_program(GLcontext * ctx,
store_vector4(inst, machine, result);
}
break;
+ case OPCODE_DP2:
+ {
+ GLfloat a[4], b[4], result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ fetch_vector4(&inst->SrcReg[1], machine, b);
+ result[0] = result[1] = result[2] = result[3] = DOT2(a, b);
+ store_vector4(inst, machine, result);
+ if (DEBUG_PROG) {
+ printf("DP2 %g = (%g %g) . (%g %g)\n",
+ result[0], a[0], a[1], b[0], b[1]);
+ }
+ }
+ break;
+ case OPCODE_DP2A:
+ {
+ GLfloat a[4], b[4], c, result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ fetch_vector4(&inst->SrcReg[1], machine, b);
+ fetch_vector1(&inst->SrcReg[1], machine, &c);
+ result[0] = result[1] = result[2] = result[3] = DOT2(a, b) + c;
+ store_vector4(inst, machine, result);
+ if (DEBUG_PROG) {
+ printf("DP2A %g = (%g %g) . (%g %g) + %g\n",
+ result[0], a[0], a[1], b[0], b[1], c);
+ }
+ }
+ break;
case OPCODE_DP3:
{
GLfloat a[4], b[4], result[4];
@@ -682,8 +836,7 @@ _mesa_execute_program(GLcontext * ctx,
GLfloat a[4], b[4], result[4];
fetch_vector4(&inst->SrcReg[0], machine, a);
fetch_vector4(&inst->SrcReg[1], machine, b);
- result[0] = result[1] = result[2] = result[3] =
- a[0] * b[0] + a[1] * b[1] + a[2] * b[2] + b[3];
+ result[0] = result[1] = result[2] = result[3] = DOT3(a, b) + b[3];
store_vector4(inst, machine, result);
}
break;
@@ -1020,39 +1173,94 @@ _mesa_execute_program(GLcontext * ctx,
break;
case OPCODE_NOP:
break;
- case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
+ case OPCODE_NOT: /* bitwise NOT */
+ {
+ GLuint a[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ result[0] = ~a[0];
+ result[1] = ~a[1];
+ result[2] = ~a[2];
+ result[3] = ~a[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
+ case OPCODE_NRM3: /* 3-component normalization */
{
GLfloat a[4], result[4];
+ GLfloat tmp;
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2];
+ if (tmp != 0.0F)
+ tmp = 1.0F / tmp;
+ result[0] = tmp * a[0];
+ result[1] = tmp * a[1];
+ result[2] = tmp * a[2];
+ result[3] = 0.0; /* undefined, but prevent valgrind warnings */
+ store_vector4(inst, machine, result);
+ }
+ break;
+ case OPCODE_NRM4: /* 4-component normalization */
+ {
+ GLfloat a[4], result[4];
+ GLfloat tmp;
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2] + a[3] * a[3];
+ if (tmp != 0.0F)
+ tmp = 1.0F / tmp;
+ result[0] = tmp * a[0];
+ result[1] = tmp * a[1];
+ result[2] = tmp * a[2];
+ result[3] = tmp * a[3];
+ store_vector4(inst, machine, result);
+ }
+ break;
+ case OPCODE_OR: /* bitwise OR */
+ {
+ GLuint a[4], b[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ fetch_vector4ui(&inst->SrcReg[1], machine, b);
+ result[0] = a[0] | b[0];
+ result[1] = a[1] | b[1];
+ result[2] = a[2] | b[2];
+ result[3] = a[3] | b[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
+ case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
+ {
+ GLfloat a[4];
+ GLuint result[4];
GLhalfNV hx, hy;
- GLuint *rawResult = (GLuint *) result;
- GLuint twoHalves;
fetch_vector4(&inst->SrcReg[0], machine, a);
hx = _mesa_float_to_half(a[0]);
hy = _mesa_float_to_half(a[1]);
- twoHalves = hx | (hy << 16);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = twoHalves;
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = hx | (hy << 16);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */
{
- GLfloat a[4], result[4];
- GLuint usx, usy, *rawResult = (GLuint *) result;
+ GLfloat a[4];
+ GLuint result[4], usx, usy;
fetch_vector4(&inst->SrcReg[0], machine, a);
a[0] = CLAMP(a[0], 0.0F, 1.0F);
a[1] = CLAMP(a[1], 0.0F, 1.0F);
usx = IROUND(a[0] * 65535.0F);
usy = IROUND(a[1] * 65535.0F);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = usx | (usy << 16);
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = usx | (usy << 16);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */
{
- GLfloat a[4], result[4];
- GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
+ GLfloat a[4];
+ GLuint result[4], ubx, uby, ubz, ubw;
fetch_vector4(&inst->SrcReg[0], machine, a);
a[0] = CLAMP(a[0], -128.0F / 127.0F, 1.0F);
a[1] = CLAMP(a[1], -128.0F / 127.0F, 1.0F);
@@ -1062,15 +1270,17 @@ _mesa_execute_program(GLcontext * ctx,
uby = IROUND(127.0F * a[1] + 128.0F);
ubz = IROUND(127.0F * a[2] + 128.0F);
ubw = IROUND(127.0F * a[3] + 128.0F);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */
{
- GLfloat a[4], result[4];
- GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
+ GLfloat a[4];
+ GLuint result[4], ubx, uby, ubz, ubw;
fetch_vector4(&inst->SrcReg[0], machine, a);
a[0] = CLAMP(a[0], 0.0F, 1.0F);
a[1] = CLAMP(a[1], 0.0F, 1.0F);
@@ -1080,9 +1290,11 @@ _mesa_execute_program(GLcontext * ctx,
uby = IROUND(255.0F * a[1]);
ubz = IROUND(255.0F * a[2]);
ubw = IROUND(255.0F * a[3]);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_POW:
@@ -1278,6 +1490,17 @@ _mesa_execute_program(GLcontext * ctx,
}
}
break;
+ case OPCODE_SSG: /* set sign (-1, 0 or +1) */
+ {
+ GLfloat a[4], result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ result[0] = (GLfloat) ((a[0] > 0.0F) - (a[0] < 0.0F));
+ result[1] = (GLfloat) ((a[1] > 0.0F) - (a[1] < 0.0F));
+ result[2] = (GLfloat) ((a[2] > 0.0F) - (a[2] < 0.0F));
+ result[3] = (GLfloat) ((a[3] > 0.0F) - (a[3] < 0.0F));
+ store_vector4(inst, machine, result);
+ }
+ break;
case OPCODE_STR: /* set true, operands ignored */
{
static const GLfloat result[4] = { 1.0F, 1.0F, 1.0F, 1.0F };
@@ -1476,6 +1699,18 @@ _mesa_execute_program(GLcontext * ctx,
store_vector4(inst, machine, result);
}
break;
+ case OPCODE_XOR: /* bitwise XOR */
+ {
+ GLuint a[4], b[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ fetch_vector4ui(&inst->SrcReg[1], machine, b);
+ result[0] = a[0] ^ b[0];
+ result[1] = a[1] ^ b[1];
+ result[2] = a[2] ^ b[2];
+ result[3] = a[3] ^ b[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
case OPCODE_XPD: /* cross product */
{
GLfloat a[4], b[4], result[4];
diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c
index 7e340ce4545..54df3fb2e15 100644
--- a/src/mesa/shader/prog_instruction.c
+++ b/src/mesa/shader/prog_instruction.c
@@ -154,6 +154,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_NOP, "NOP", 0, 0 },
{ OPCODE_ABS, "ABS", 1, 1 },
{ OPCODE_ADD, "ADD", 2, 1 },
+ { OPCODE_AND, "AND", 2, 1 },
{ OPCODE_ARA, "ARA", 1, 1 },
{ OPCODE_ARL, "ARL", 1, 1 },
{ OPCODE_ARL_NV, "ARL", 1, 1 },
@@ -168,6 +169,8 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_COS, "COS", 1, 1 },
{ OPCODE_DDX, "DDX", 1, 1 },
{ OPCODE_DDY, "DDY", 1, 1 },
+ { OPCODE_DP2, "DP2", 2, 1 },
+ { OPCODE_DP2A, "DP2A", 3, 1 },
{ OPCODE_DP3, "DP3", 2, 1 },
{ OPCODE_DP4, "DP4", 2, 1 },
{ OPCODE_DPH, "DPH", 2, 1 },
@@ -193,10 +196,14 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_MIN, "MIN", 2, 1 },
{ OPCODE_MOV, "MOV", 1, 1 },
{ OPCODE_MUL, "MUL", 2, 1 },
+ { OPCODE_NOT, "NOT", 1, 1 },
{ OPCODE_NOISE1, "NOISE1", 1, 1 },
{ OPCODE_NOISE2, "NOISE2", 1, 1 },
{ OPCODE_NOISE3, "NOISE3", 1, 1 },
{ OPCODE_NOISE4, "NOISE4", 1, 1 },
+ { OPCODE_OR, "OR", 2, 1 },
+ { OPCODE_NRM3, "NRM3", 1, 1 },
+ { OPCODE_NRM4, "NRM4", 1, 1 },
{ OPCODE_PK2H, "PK2H", 1, 1 },
{ OPCODE_PK2US, "PK2US", 1, 1 },
{ OPCODE_PK4B, "PK4B", 1, 1 },
@@ -235,6 +242,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_UP4B, "UP4B", 1, 1 },
{ OPCODE_UP4UB, "UP4UB", 1, 1 },
{ OPCODE_X2D, "X2D", 3, 1 },
+ { OPCODE_XOR, "XOR", 2, 1 },
{ OPCODE_XPD, "XPD", 2, 1 }
};
diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index 2be39ac6244..6a0e62221a0 100644
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -145,6 +145,7 @@ typedef enum prog_opcode {
OPCODE_NOP = 0, /* X */
OPCODE_ABS, /* X X 1.1 X */
OPCODE_ADD, /* X X X X X */
+ OPCODE_AND, /* */
OPCODE_ARA, /* 2 */
OPCODE_ARL, /* X X */
OPCODE_ARL_NV, /* 2 */
@@ -159,6 +160,8 @@ typedef enum prog_opcode {
OPCODE_COS, /* X 2 X X */
OPCODE_DDX, /* X X */
OPCODE_DDY, /* X X */
+ OPCODE_DP2, /* 2 */
+ OPCODE_DP2A, /* 2 */
OPCODE_DP3, /* X X X X X */
OPCODE_DP4, /* X X X X X */
OPCODE_DPH, /* X X 1.1 */
@@ -188,6 +191,10 @@ typedef enum prog_opcode {
OPCODE_NOISE2, /* X */
OPCODE_NOISE3, /* X */
OPCODE_NOISE4, /* X */
+ OPCODE_NOT, /* */
+ OPCODE_NRM3, /* */
+ OPCODE_NRM4, /* */
+ OPCODE_OR, /* */
OPCODE_PK2H, /* X */
OPCODE_PK2US, /* X */
OPCODE_PK4B, /* X */
@@ -226,6 +233,7 @@ typedef enum prog_opcode {
OPCODE_UP4B, /* X */
OPCODE_UP4UB, /* X */
OPCODE_X2D, /* X */
+ OPCODE_XOR, /* */
OPCODE_XPD, /* X X X */
MAX_OPCODE
} gl_inst_opcode;
diff --git a/src/mesa/shader/slang/slang_codegen.c b/src/mesa/shader/slang/slang_codegen.c
index d83e3b01e6b..ea35d679694 100644
--- a/src/mesa/shader/slang/slang_codegen.c
+++ b/src/mesa/shader/slang/slang_codegen.c
@@ -413,6 +413,9 @@ static slang_asm_info AsmInfo[] = {
{ "vec4_multiply", IR_MUL, 1, 2 },
{ "vec4_dot", IR_DOT4, 1, 2 },
{ "vec3_dot", IR_DOT3, 1, 2 },
+ { "vec2_dot", IR_DOT2, 1, 2 },
+ { "vec3_nrm", IR_NRM3, 1, 1 },
+ { "vec4_nrm", IR_NRM4, 1, 1 },
{ "vec3_cross", IR_CROSS, 1, 2 },
{ "vec4_lrp", IR_LRP, 1, 3 },
{ "vec4_min", IR_MIN, 1, 2 },
diff --git a/src/mesa/shader/slang/slang_emit.c b/src/mesa/shader/slang/slang_emit.c
index 672ec4bd606..827760c917a 100644
--- a/src/mesa/shader/slang/slang_emit.c
+++ b/src/mesa/shader/slang/slang_emit.c
@@ -488,6 +488,9 @@ instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
case OPCODE_MUL:
operator = "*";
break;
+ case OPCODE_DP2:
+ operator = "DP2";
+ break;
case OPCODE_DP3:
operator = "DP3";
break;
@@ -708,7 +711,7 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
}
else {
assert(size == 2);
- dotOp = OPCODE_DP3;
+ dotOp = OPCODE_DP3; /* XXX use OPCODE_DP2 eventually */
swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
}
@@ -1893,12 +1896,15 @@ emit(slang_emit_info *emitInfo, slang_ir_node *n)
case IR_NOISE2:
case IR_NOISE3:
case IR_NOISE4:
+ case IR_NRM4:
+ case IR_NRM3:
/* binary */
case IR_ADD:
case IR_SUB:
case IR_MUL:
case IR_DOT4:
case IR_DOT3:
+ case IR_DOT2:
case IR_CROSS:
case IR_MIN:
case IR_MAX:
diff --git a/src/mesa/shader/slang/slang_ir.c b/src/mesa/shader/slang/slang_ir.c
index 20498e8c66a..9d055bf3543 100644
--- a/src/mesa/shader/slang/slang_ir.c
+++ b/src/mesa/shader/slang/slang_ir.c
@@ -27,6 +27,7 @@
#include "main/context.h"
#include "slang_ir.h"
#include "slang_mem.h"
+#include "shader/prog_instruction.h"
#include "shader/prog_print.h"
@@ -36,8 +37,11 @@ static const slang_ir_info IrInfo[] = {
{ IR_SUB, "IR_SUB", OPCODE_SUB, 4, 2 },
{ IR_MUL, "IR_MUL", OPCODE_MUL, 4, 2 },
{ IR_DIV, "IR_DIV", OPCODE_NOP, 0, 2 }, /* XXX broke */
- { IR_DOT4, "IR_DOT_4", OPCODE_DP4, 1, 2 },
- { IR_DOT3, "IR_DOT_3", OPCODE_DP3, 1, 2 },
+ { IR_DOT4, "IR_DOT4", OPCODE_DP4, 1, 2 },
+ { IR_DOT3, "IR_DOT3", OPCODE_DP3, 1, 2 },
+ { IR_DOT2, "IR_DOT2", OPCODE_DP2, 1, 2 },
+ { IR_NRM4, "IR_NRM4", OPCODE_NRM4, 1, 1 },
+ { IR_NRM3, "IR_NRM3", OPCODE_NRM3, 1, 1 },
{ IR_CROSS, "IR_CROSS", OPCODE_XPD, 3, 2 },
{ IR_LRP, "IR_LRP", OPCODE_LRP, 4, 3 },
{ IR_MIN, "IR_MIN", OPCODE_MIN, 4, 2 },
diff --git a/src/mesa/shader/slang/slang_ir.h b/src/mesa/shader/slang/slang_ir.h
index f64f9a93b78..ab0353c28a5 100644
--- a/src/mesa/shader/slang/slang_ir.h
+++ b/src/mesa/shader/slang/slang_ir.h
@@ -83,6 +83,9 @@ typedef enum
IR_DIV,
IR_DOT4,
IR_DOT3,
+ IR_DOT2,
+ IR_NRM4,
+ IR_NRM3,
IR_CROSS, /* vec3 cross product */
IR_LRP,
IR_CLAMP,