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authorBrian Paul <[email protected]>2004-04-02 17:27:46 +0000
committerBrian Paul <[email protected]>2004-04-02 17:27:46 +0000
commitff1a015ca86ed4ea2ca3fdd49ed9daaae19359a2 (patch)
treee8d6b32b675f6aa9dcaa631795352ec6acbb8976 /src/mesa/shader
parent17355e8b38d4581a069d3daf1d1bba87f1eb3612 (diff)
Implement ARB_f_p KIL correctly.
Diffstat (limited to 'src/mesa/shader')
-rw-r--r--src/mesa/shader/nvfragparse.c4
-rw-r--r--src/mesa/shader/nvfragprog.h3
2 files changed, 4 insertions, 3 deletions
diff --git a/src/mesa/shader/nvfragparse.c b/src/mesa/shader/nvfragparse.c
index b742ff0a32d..bdc2c7ef94a 100644
--- a/src/mesa/shader/nvfragparse.c
+++ b/src/mesa/shader/nvfragparse.c
@@ -95,7 +95,7 @@ static const struct instruction_pattern Instructions[] = {
{ "EX2", FP_OPCODE_DP4, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
{ "FLR", FP_OPCODE_FLR, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
{ "FRC", FP_OPCODE_FRC, INPUT_1V, OUTPUT_V, _R | _H | _X | _C | _S },
- { "KIL", FP_OPCODE_KIL, INPUT_CC, OUTPUT_NONE, 0 },
+ { "KIL", FP_OPCODE_KIL_NV, INPUT_CC, OUTPUT_NONE, 0 },
{ "LG2", FP_OPCODE_LG2, INPUT_1S, OUTPUT_S, _R | _H | _C | _S },
{ "LIT", FP_OPCODE_LIT, INPUT_1V, OUTPUT_V, _R | _H | _C | _S },
{ "LRP", FP_OPCODE_LRP, INPUT_3V, OUTPUT_V, _R | _H | _X | _C | _S },
@@ -1291,7 +1291,7 @@ Parse_InstructionSequence(struct parse_state *parseState,
RETURN_ERROR1("Expected ,");
}
else if (instMatch.outputs == OUTPUT_NONE) {
- ASSERT(instMatch.opcode == FP_OPCODE_KIL);
+ ASSERT(instMatch.opcode == FP_OPCODE_KIL_NV);
/* This is a little weird, the cond code info is in the dest register */
if (!Parse_CondCodeMask(parseState, &inst->DstReg))
RETURN_ERROR;
diff --git a/src/mesa/shader/nvfragprog.h b/src/mesa/shader/nvfragprog.h
index e83827d1a16..53f4bf9905c 100644
--- a/src/mesa/shader/nvfragprog.h
+++ b/src/mesa/shader/nvfragprog.h
@@ -75,7 +75,8 @@ enum fp_opcode {
FP_OPCODE_EX2,
FP_OPCODE_FLR,
FP_OPCODE_FRC,
- FP_OPCODE_KIL,
+ FP_OPCODE_KIL_NV, /* NV_f_p only */
+ FP_OPCODE_KIL, /* ARB_f_p only */
FP_OPCODE_LG2,
FP_OPCODE_LIT,
FP_OPCODE_LRP,