NV fp parser: Support instruction and TEMP / OUTPUT sizes

Adds support for declaring TEMP and OUTPUT variables as 'LONG' or
'SHORT' precision.  The precision specifiers are parsed, but they are
currently ignored.  Some support for this may be added in the future,
but neither Intel hardware nor, as far as I'm aware, Radeon hardware
support multiple precisions.

Also adds support for instruction precision ('X', 'H', and 'R')
suffixes and instruction condition code output ('C') suffix.  This
results in a fairly major change to the lexer.  Instructions are
matched with all the possible suffix strings.  The suffix string are
then carved off by a context (i.e., which program mode and options are
set) aware parser that converts the suffixes to bits in
prog_instruction.

This could have been handled in the same way _SAT was originally
handled in the lexer, but it would have resulted in a very large lexer
with lots of opportunity for cut-and-paste errors.

1 files changed, 46 insertions, 4 deletions

diff --git a/src/mesa/shader/program_parse.y b/src/mesa/shader/program_parse.y
index 4e2912d1c4d..51cc9f7f119 100644
--- a/src/mesa/shader/program_parse.y
+++ b/src/mesa/shader/program_parse.y
@@ -1811,7 +1811,46 @@ optionalSign: '+'        { $$ = FALSE; }
 	|                { $$ = FALSE; }
 	;
 
-TEMP_statement: TEMP { $<integer>$ = $1; } varNameList
+TEMP_statement: optVarSize TEMP { $<integer>$ = $2; } varNameList
+	;
+
+optVarSize: IDENTIFIER
+	{
+	   /* NV_fragment_program_option defines the size qualifiers in a
+	    * fairly broken way.  "SHORT" or "LONG" can optionally be used
+	    * before TEMP or OUTPUT.  However, neither is a reserved word!
+	    * This means that we have to parse it as an identifier, then check
+	    * to make sure it's one of the valid values.  *sigh*
+	    *
+	    * In addition, the grammar in the extension spec does *not* allow
+	    * the size specifier to be optional, but all known implementations
+	    * do.
+	    */
+	   if (!state->option.NV_fragment) {
+	      yyerror(& @1, state, "unexpected IDENTIFIER");
+	      YYERROR;
+	   }
+
+	   if (strcmp("SHORT", $1) == 0) {
+	   } else if (strcmp("LONG", $1) == 0) {
+	   } else {
+	      char *const err_str =
+		 make_error_string("invalid storage size specifier \"%s\"",
+				   $1);
+
+	      yyerror(& @1, state, (err_str != NULL)
+		      ? err_str : "invalid storage size specifier");
+
+	      if (err_str != NULL) {
+		 _mesa_free(err_str);
+	      }
+
+	      YYERROR;
+	   }
+	}
+	|
+	{
+	}
 	;
 
 ADDRESS_statement: ADDRESS { $<integer>$ = $1; } varNameList
@@ -1831,15 +1870,15 @@ varNameList: varNameList ',' IDENTIFIER
 	}
 	;
 
-OUTPUT_statement: OUTPUT IDENTIFIER '=' resultBinding
+OUTPUT_statement: optVarSize OUTPUT IDENTIFIER '=' resultBinding
 	{
 	   struct asm_symbol *const s =
-	      declare_variable(state, $2, at_output, & @2);
+	      declare_variable(state, $3, at_output, & @3);
 
 	   if (s == NULL) {
 	      YYERROR;
 	   } else {
-	      s->output_binding = $4;
+	      s->output_binding = $5;
 	   }
 	}
 	;
@@ -2096,7 +2135,10 @@ asm_instruction_copy_ctor(const struct prog_instruction *base,
    if (inst) {
       _mesa_init_instructions(& inst->Base, 1);
       inst->Base.Opcode = base->Opcode;
+      inst->Base.CondUpdate = base->CondUpdate;
+      inst->Base.CondDst = base->CondDst;
       inst->Base.SaturateMode = base->SaturateMode;
+      inst->Base.Precision = base->Precision;
 
       asm_instruction_set_operands(inst, dst, src0, src1, src2);
    }