diff options
author | Matt Turner <[email protected]> | 2013-04-09 22:43:05 -0700 |
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committer | Matt Turner <[email protected]> | 2013-05-06 10:17:13 -0700 |
commit | dafd050883660a42b2902388826cfecbfc9b8b83 (patch) | |
tree | ea6bba7a3f32ffab590953297a141c97148d1365 /src/mesa/program | |
parent | 9c04b8c28c3a8b60e896492fd1bccc923916c1c4 (diff) |
glsl: Add a pass to lower bitfield-insert into bfm+bfi.
i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement
bitfieldInsert() from ARB_gpu_shader5.
v2: Add ir_binop_bfm and ir_triop_bfi to st_glsl_to_tgsi.cpp.
Remove spurious temporary assignment and dereference.
Reviewed-by: Chris Forbes <[email protected]>
Diffstat (limited to 'src/mesa/program')
-rw-r--r-- | src/mesa/program/ir_to_mesa.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index c6f6bf42ea0..084846201c9 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -1489,6 +1489,8 @@ ir_to_mesa_visitor::visit(ir_expression *ir) emit(ir, OPCODE_LRP, result_dst, op[2], op[1], op[0]); break; + case ir_binop_bfm: + case ir_triop_bfi: case ir_triop_bitfield_extract: case ir_quadop_bitfield_insert: assert(!"not supported"); |