diff options
author | Keith Whitwell <[email protected]> | 2007-12-17 16:14:29 +0000 |
---|---|---|
committer | Keith Whitwell <[email protected]> | 2007-12-17 16:14:29 +0000 |
commit | bfe79babf99e6b9435195178d1ea64687c60d161 (patch) | |
tree | 2d526bbee445fce7db6cd2bba7207cfcebe74f0e /src/mesa/pipe/i965simple | |
parent | 556e247cee905f84d639b4a292e891c24b36bea1 (diff) |
gallium: incorporate alpha state into depth_stencil state object.
Diffstat (limited to 'src/mesa/pipe/i965simple')
-rw-r--r-- | src/mesa/pipe/i965simple/brw_cc.c | 49 | ||||
-rw-r--r-- | src/mesa/pipe/i965simple/brw_context.h | 3 | ||||
-rw-r--r-- | src/mesa/pipe/i965simple/brw_state.c | 42 | ||||
-rw-r--r-- | src/mesa/pipe/i965simple/brw_wm.c | 13 | ||||
-rw-r--r-- | src/mesa/pipe/i965simple/brw_wm_state.c | 2 |
5 files changed, 38 insertions, 71 deletions
diff --git a/src/mesa/pipe/i965simple/brw_cc.c b/src/mesa/pipe/i965simple/brw_cc.c index 6cc1505311e..dcee7318958 100644 --- a/src/mesa/pipe/i965simple/brw_cc.c +++ b/src/mesa/pipe/i965simple/brw_cc.c @@ -156,38 +156,37 @@ static void upload_cc_unit( struct brw_context *brw ) memset(&cc, 0, sizeof(cc)); /* BRW_NEW_DEPTH_STENCIL */ - if (brw->attribs.DepthStencil->stencil.front_enabled) { - cc.cc0.stencil_enable = brw->attribs.DepthStencil->stencil.front_enabled; - cc.cc0.stencil_func = brw_translate_compare_func(brw->attribs.DepthStencil->stencil.front_func); - cc.cc0.stencil_fail_op = brw_translate_stencil_op(brw->attribs.DepthStencil->stencil.front_fail_op); + if (brw->attribs.DepthStencil->stencil[0].enabled) { + cc.cc0.stencil_enable = brw->attribs.DepthStencil->stencil[0].enabled; + cc.cc0.stencil_func = brw_translate_compare_func(brw->attribs.DepthStencil->stencil[0].func); + cc.cc0.stencil_fail_op = brw_translate_stencil_op(brw->attribs.DepthStencil->stencil[0].fail_op); cc.cc0.stencil_pass_depth_fail_op = brw_translate_stencil_op( - brw->attribs.DepthStencil->stencil.front_zfail_op); + brw->attribs.DepthStencil->stencil[0].zfail_op); cc.cc0.stencil_pass_depth_pass_op = brw_translate_stencil_op( - brw->attribs.DepthStencil->stencil.front_zpass_op); - cc.cc1.stencil_ref = brw->attribs.DepthStencil->stencil.ref_value[0]; - cc.cc1.stencil_write_mask = brw->attribs.DepthStencil->stencil.write_mask[0]; - cc.cc1.stencil_test_mask = brw->attribs.DepthStencil->stencil.value_mask[0]; + brw->attribs.DepthStencil->stencil[0].zpass_op); + cc.cc1.stencil_ref = brw->attribs.DepthStencil->stencil[0].ref_value; + cc.cc1.stencil_write_mask = brw->attribs.DepthStencil->stencil[0].write_mask; + cc.cc1.stencil_test_mask = brw->attribs.DepthStencil->stencil[0].value_mask; - if (brw->attribs.DepthStencil->stencil.back_enabled) { - cc.cc0.bf_stencil_enable = brw->attribs.DepthStencil->stencil.back_enabled; + if (brw->attribs.DepthStencil->stencil[1].enabled) { + cc.cc0.bf_stencil_enable = brw->attribs.DepthStencil->stencil[1].enabled; cc.cc0.bf_stencil_func = brw_translate_compare_func( - brw->attribs.DepthStencil->stencil.back_func); + brw->attribs.DepthStencil->stencil[1].func); cc.cc0.bf_stencil_fail_op = brw_translate_stencil_op( - brw->attribs.DepthStencil->stencil.back_fail_op); + brw->attribs.DepthStencil->stencil[1].fail_op); cc.cc0.bf_stencil_pass_depth_fail_op = brw_translate_stencil_op( - brw->attribs.DepthStencil->stencil.back_zfail_op); + brw->attribs.DepthStencil->stencil[1].zfail_op); cc.cc0.bf_stencil_pass_depth_pass_op = brw_translate_stencil_op( - brw->attribs.DepthStencil->stencil.back_zpass_op); - cc.cc1.bf_stencil_ref = brw->attribs.DepthStencil->stencil.ref_value[1]; - cc.cc2.bf_stencil_write_mask = brw->attribs.DepthStencil->stencil.write_mask[1]; - cc.cc2.bf_stencil_test_mask = brw->attribs.DepthStencil->stencil.value_mask[1]; + brw->attribs.DepthStencil->stencil[1].zpass_op); + cc.cc1.bf_stencil_ref = brw->attribs.DepthStencil->stencil[1].ref_value; + cc.cc2.bf_stencil_write_mask = brw->attribs.DepthStencil->stencil[1].write_mask; + cc.cc2.bf_stencil_test_mask = brw->attribs.DepthStencil->stencil[1].value_mask; } /* Not really sure about this: */ - if (brw->attribs.DepthStencil->stencil.write_mask[0] || - (brw->attribs.DepthStencil->stencil.back_enabled && - brw->attribs.DepthStencil->stencil.write_mask[1])) + if (brw->attribs.DepthStencil->stencil[0].write_mask || + brw->attribs.DepthStencil->stencil[1].write_mask) cc.cc0.stencil_write_enable = 1; } @@ -228,11 +227,13 @@ static void upload_cc_unit( struct brw_context *brw ) /* BRW_NEW_ALPHATEST */ - if (brw->attribs.AlphaTest->enabled) { + if (brw->attribs.DepthStencil->alpha.enabled) { cc.cc3.alpha_test = 1; - cc.cc3.alpha_test_func = brw_translate_compare_func(brw->attribs.AlphaTest->func); + cc.cc3.alpha_test_func = + brw_translate_compare_func(brw->attribs.DepthStencil->alpha.func); - UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], brw->attribs.AlphaTest->ref); + UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], + brw->attribs.DepthStencil->alpha.ref); cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8; } diff --git a/src/mesa/pipe/i965simple/brw_context.h b/src/mesa/pipe/i965simple/brw_context.h index 318c6a7049d..11146570be7 100644 --- a/src/mesa/pipe/i965simple/brw_context.h +++ b/src/mesa/pipe/i965simple/brw_context.h @@ -479,9 +479,8 @@ struct brw_context struct { - const struct pipe_alpha_test_state *AlphaTest; const struct pipe_blend_state *Blend; - const struct pipe_depth_stencil_state *DepthStencil; + const struct pipe_depth_stencil_alpha_state *DepthStencil; const struct pipe_poly_stipple *PolygonStipple; const struct pipe_rasterizer_state *Raster; const struct pipe_sampler_state *Samplers[PIPE_MAX_SAMPLERS]; diff --git a/src/mesa/pipe/i965simple/brw_state.c b/src/mesa/pipe/i965simple/brw_state.c index 26450ae5971..e7f5a27a380 100644 --- a/src/mesa/pipe/i965simple/brw_state.c +++ b/src/mesa/pipe/i965simple/brw_state.c @@ -116,9 +116,9 @@ static void brw_delete_sampler_state(struct pipe_context *pipe, static void * brw_create_depth_stencil_state(struct pipe_context *pipe, - const struct pipe_depth_stencil_state *depth_stencil) + const struct pipe_depth_stencil_alpha_state *depth_stencil) { - DUP( pipe_depth_stencil_state, depth_stencil ); + DUP( pipe_depth_stencil_alpha_state, depth_stencil ); } static void brw_bind_depth_stencil_state(struct pipe_context *pipe, @@ -126,7 +126,7 @@ static void brw_bind_depth_stencil_state(struct pipe_context *pipe, { struct brw_context *brw = brw_context(pipe); - brw->attribs.DepthStencil = (const struct pipe_depth_stencil_state *)depth_stencil; + brw->attribs.DepthStencil = (const struct pipe_depth_stencil_alpha_state *)depth_stencil; brw->state.dirty.brw |= BRW_NEW_DEPTH_STENCIL; } @@ -138,32 +138,6 @@ static void brw_delete_depth_stencil_state(struct pipe_context *pipe, } /************************************************************************ - * Alpha test - */ -static void * -brw_create_alpha_test_state(struct pipe_context *pipe, - const struct pipe_alpha_test_state *alpha_test) -{ - DUP(pipe_alpha_test_state, alpha_test); -} - -static void brw_bind_alpha_test_state(struct pipe_context *pipe, - void *alpha) -{ - struct brw_context *brw = brw_context(pipe); - - brw->attribs.AlphaTest = (const struct pipe_alpha_test_state*)alpha; - - brw->state.dirty.brw |= BRW_NEW_ALPHA_TEST; -} - -static void brw_delete_alpha_test_state(struct pipe_context *pipe, - void *alpha) -{ - free(alpha); -} - -/************************************************************************ * Scissor */ static void brw_set_scissor_state( struct pipe_context *pipe, @@ -415,10 +389,6 @@ static void brw_delete_rasterizer_state(struct pipe_context *pipe, void brw_init_state_functions( struct brw_context *brw ) { - brw->pipe.create_alpha_test_state = brw_create_alpha_test_state; - brw->pipe.bind_alpha_test_state = brw_bind_alpha_test_state; - brw->pipe.delete_alpha_test_state = brw_delete_alpha_test_state; - brw->pipe.create_blend_state = brw_create_blend_state; brw->pipe.bind_blend_state = brw_bind_blend_state; brw->pipe.delete_blend_state = brw_delete_blend_state; @@ -427,9 +397,9 @@ brw_init_state_functions( struct brw_context *brw ) brw->pipe.bind_sampler_state = brw_bind_sampler_state; brw->pipe.delete_sampler_state = brw_delete_sampler_state; - brw->pipe.create_depth_stencil_state = brw_create_depth_stencil_state; - brw->pipe.bind_depth_stencil_state = brw_bind_depth_stencil_state; - brw->pipe.delete_depth_stencil_state = brw_delete_depth_stencil_state; + brw->pipe.create_depth_stencil_alpha_state = brw_create_depth_stencil_state; + brw->pipe.bind_depth_stencil_alpha_state = brw_bind_depth_stencil_state; + brw->pipe.delete_depth_stencil_alpha_state = brw_delete_depth_stencil_state; brw->pipe.create_rasterizer_state = brw_create_rasterizer_state; brw->pipe.bind_rasterizer_state = brw_bind_rasterizer_state; diff --git a/src/mesa/pipe/i965simple/brw_wm.c b/src/mesa/pipe/i965simple/brw_wm.c index f0a38d384bd..0ee0fbed511 100644 --- a/src/mesa/pipe/i965simple/brw_wm.c +++ b/src/mesa/pipe/i965simple/brw_wm.c @@ -93,15 +93,14 @@ static void brw_wm_populate_key( struct brw_context *brw, /* Build the index for table lookup */ - /* _NEW_COLOR */ + /* BRW_NEW_DEPTH_STENCIL */ if (fp->UsesKill || - brw->attribs.AlphaTest->enabled) + brw->attribs.DepthStencil->alpha.enabled) lookup |= IZ_PS_KILL_ALPHATEST_BIT; if (fp->ComputesDepth) lookup |= IZ_PS_COMPUTES_DEPTH_BIT; - /* _NEW_DEPTH */ if (brw->attribs.DepthStencil->depth.enabled) lookup |= IZ_DEPTH_TEST_ENABLE_BIT; @@ -109,13 +108,11 @@ static void brw_wm_populate_key( struct brw_context *brw, brw->attribs.DepthStencil->depth.writemask) /* ?? */ lookup |= IZ_DEPTH_WRITE_ENABLE_BIT; - /* _NEW_STENCIL */ - if (brw->attribs.DepthStencil->stencil.front_enabled) { + if (brw->attribs.DepthStencil->stencil[0].enabled) { lookup |= IZ_STENCIL_TEST_ENABLE_BIT; - if (brw->attribs.DepthStencil->stencil.write_mask[0] || - (brw->attribs.DepthStencil->stencil.back_enabled && - brw->attribs.DepthStencil->stencil.write_mask[1])) + if (brw->attribs.DepthStencil->stencil[0].write_mask || + brw->attribs.DepthStencil->stencil[1].write_mask) lookup |= IZ_STENCIL_WRITE_ENABLE_BIT; } diff --git a/src/mesa/pipe/i965simple/brw_wm_state.c b/src/mesa/pipe/i965simple/brw_wm_state.c index 52d2c854237..5ccd4888423 100644 --- a/src/mesa/pipe/i965simple/brw_wm_state.c +++ b/src/mesa/pipe/i965simple/brw_wm_state.c @@ -122,7 +122,7 @@ static void upload_wm_unit(struct brw_context *brw ) /* BRW_NEW_ALPHA_TEST */ if (fp->UsesKill || - brw->attribs.AlphaTest->enabled) + brw->attribs.DepthStencil->alpha.enabled) wm.wm5.program_uses_killpixel = 1; wm.wm5.enable_8_pix = 1; |