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authorKenneth Graunke <[email protected]>2013-06-13 11:23:08 -0700
committerKenneth Graunke <[email protected]>2013-06-26 11:25:13 -0700
commitdd0b99b0beccf93cd53f42e05bc834c0fed57edf (patch)
tree3646e40457ab1cb66b4d72dd1fa6f5e9d5433a6b /src/mesa/main/texcompress_rgtc.c
parent55272883acc8a5a6cf4d725bfd4713e7d347ce3b (diff)
i965/vs: Combine code generation's inst->opcode switch statements.
vec4_visitor::generate_code() switches on vec4_instruction::opcode and calls into the brw_eu_emit.c layer to generate code for some of them. It then has a default case which calls generate_vec4_instruction() to handle the rest...which switches on opcode and handles the rest of the cases. The split apparently is that generate_code() handles the actual hardware opcodes (BRW_OPCODE_*) while generate_vec4_instruction() handles the virtual opcodes (SHADER_OPCODE_* and VS_OPCODE_*). But this looks fairly arbitrary, and it makes more sense to combine the two switches. This patch moves the cases from generate_code() into the helper function so that generate_code() isn't as large. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/main/texcompress_rgtc.c')
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