diff options
| author | Eric Anholt <[email protected]> | 2014-02-13 11:03:49 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2014-03-24 11:15:05 -0700 |
| commit | 4545ec1691be3ff8a46c07eb4106106046a09fc1 (patch) | |
| tree | e573d0927e311886e8a99477e013b8b6998aeb15 /src/mesa/main/syncobj.c | |
| parent | 7ccb26fdecd520f91ff1197b685b8f4f63130e58 (diff) | |
i965/gen8: Change the winsys MSAA blits from blorp to meta.
This gets us equivalent code paths on BDW and pre-BDW, except for stencil
(where we don't have MSAA stencil resolve code yet)
Improves MSAA-forced citybench by 7.94496% +/- 2.38429% (n=16). Reduces
DRI2 MSAA glxgears performance by -12.3559% +/- 1.52845% (n=9).
v2: Move the new meta code to brw_meta_updownsample.c, name it
brw_meta_updownsample(), add a comment about
intel_rb_storage_first_mt_slice(), and rename that function and move
the RB generation into it (review ideas by Ken).
v3: Fix 2 src vs dst pasteos in previous change.
v4: Skip this path pre-gen8 for now, until we can analyze the glxgears
performance delta some more.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/main/syncobj.c')
0 files changed, 0 insertions, 0 deletions