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authorJason Ekstrand <[email protected]>2016-09-12 12:58:38 -0700
committerJason Ekstrand <[email protected]>2016-09-14 17:53:16 -0700
commit89a96c8f43370cc84adf92ab32e3de302a1fa1d0 (patch)
treeb5262dfcae89b3be50ceb341d0f8d8aba70c42ec /src/mesa/main/sse_minmax.c
parenta814e18c96ccc70473103cf08a675265f0d1b3c9 (diff)
anv/cmd_buffer: Set the L3 atomic disable mask bit in CHICKEN3 on HSW
Without this bit set, the value in "L3 Atomic Disable" won't get applied by the hardware so we won't properly get L3 atomic caching. Fixes dEQP-VK.spirv_assembly.instruction.compute.opatomic.compex and 198 of the dEQP-VK.image.atomic_operations.* tests on HSW Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa/main/sse_minmax.c')
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